# US 2018/0024941 A1 · Adaptive tablewalk translation storage buffer predictor > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0024941 A1 - Document ID: US20180024941A1 - Status: Published application - Kind: A1 - Application number: 15/215,027 - Filed: 2016-07-20 - Published: 2018-01-25 - Earliest claimed: 2016-07-20 - Assignees: Oracle International Corporation - Applicants: Oracle International Corporation - Inventors: John Pape; Manish Shah; Gideon Levinsky; Jared Smolens - Web page: https://patentgrep.com/patent/US20180024941A1 ## CPC - G06F 12/1063: {the data cache being concurrently virtually addressed} - G06F 12/0811: with multilevel cache hierarchies - G06F 12/0817: using directory methods - G06F 12/0875: with dedicated cache, e.g. instruction or stack - G06F 12/1009: using page tables, e.g. page table structures - G06F 12/1027: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] - G06N 7/01: Probabilistic graphical models, e.g. probabilistic networks - G06F 2212/452: Instruction code - G06F 2212/60: Details of cache memory - G06F 2212/62: Details of cache specific to multiprocessor cache arrangements - G06F 2212/682: Multiprocessor TLB consistency - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract A system for generating predictions for a hardware table walk to find a map of a given virtual address to a corresponding physical address is disclosed. The system includes a plurality memories, which each includes respective plurality of entries, each of which includes a prediction of a particular one of a plurality of buffers which includes a portion of a virtual to physical address translation map. A first circuit may generate a plurality of hash values to retrieve a plurality of predictions from the plurality of memories, where each has value depends on a respective address and information associated with a respective thread. A second circuit may select a particular prediction of the retrieved predictions to use based on a history of previous predictions. ## Claims ### Claim 1 An apparatus, comprising: a plurality of memories, wherein each memory includes a plurality of entries, wherein each entry of the plurality of entries includes a respective prediction of a plurality of predictions, wherein each prediction of the plurality of predictions includes information identifying a given one of a plurality of buffers; a first circuit configured to: receive a plurality of addresses; generate a plurality of hash values, wherein each hash value is dependent upon a respective address of the plurality of addresses, and identification information associated with a respective process of a plurality of processes; and retrieve a respective prediction of a plurality of retrieved predictions from each one of the plurality of memories dependent upon a respective one of the plurality of hash values; and a second circuit configured to select a given prediction of the plurality of retrieved predictions dependent upon a history of previous predictions. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein to generate the plurality of hash values, the first circuit is further configured to generate a second hash value of the plurality of hash values dependent upon a first hash value of the plurality of hash values. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the second circuit includes a plurality of counters, and wherein the second circuit is further configured to select the given prediction dependent upon a respective value of each counter of the plurality of counters. ### Claim 4 (depends on 3) The apparatus of claim 3, wherein the second circuit is further configured to update a value of at least one counter dependent upon results of a search of a buffer identified the given prediction. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the second circuit is further configured to initiate a search, in parallel, of a subset of the plurality of buffers, in response to a determination that a confidence value included in the given prediction is less than a predetermined threshold value. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the second circuit is further configured to initiate a sequential search of a subset of the plurality of buffers, in response to a determination that a confidence level included in the given prediction is greater than or equal to a predetermined threshold value. ### Claim 7 A method, comprising: receiving a plurality of addresses; generating a plurality of hash values, wherein each value is dependent upon a respective address of the plurality of addresses, and identification information associated with a respective process of a plurality of processes; retrieving a respective prediction of a plurality of retrieved predictions from a respective memory of a plurality of memories, wherein each memory of the plurality of memories includes a plurality of entries; selecting a given prediction of the plurality of retrieved predictions dependent upon a history of previous predictions; and searching a subset of a plurality of buffers dependent upon the given prediction, wherein each buffer of the plurality of buffers includes a respective portion of a map of virtual addresses to physical addresses. ### Claim 8 (depends on 7) The method of claim 7, wherein generating the plurality of hash values comprises generating a second hash value of the plurality of hash values dependent upon a first hash value of the plurality of hash values. ### Claim 9 (depends on 7) The method of claim 7, further comprising selecting the given prediction dependent upon a respective value of each counter of a plurality of counters. ### Claim 10 (depends on 9) The method of claim 9, further comprising updating a value of at least one counter of the plurality of counters dependent upon results searching the subset of the plurality of buffers. ### Claim 11 (depends on 10) The method of claim 10, further comprising updating information in an entry included in a given one of the plurality of memories corresponding to the given prediction dependent upon the results of searching the subset of the plurality of buffers. ### Claim 12 (depends on 7) The method of claim 7, wherein searching the subset of the plurality of buffers includes searching, in parallel, the subset of the plurality of buffers, in response to determining that a confidence value included in the given prediction is less than a predetermined threshold value. ### Claim 13 (depends on 7) The method of claim 7, wherein searching the subset of the plurality of buffers includes sequentially searching the subset of the plurality of buffers, in response to determining that a confidence value included in the given prediction is greater than or equal to a predetermined threshold value. ### Claim 14 A system, comprising: a memory including a plurality of buffers, wherein each buffer of the plurality of buffers is configured to store a respective portion of a translation map, wherein the translation map includes a plurality of entries, and wherein each entry of the plurality of entries maps a given virtual address to a corresponding physical address; a processor configured to: receive a plurality of addresses; generate a plurality of hash values, wherein each hash value is dependent upon a respective address of the plurality of addresses, and identification information associated with a respective process of a plurality of processes; retrieve a respective prediction of a plurality of retrieved predictions from each memory of a plurality of memories dependent upon a respective one of the plurality of hash values; and select a given prediction of the plurality of retrieved predictions dependent upon a history of previous predictions. ### Claim 15 (depends on 14) The system of claim 14, wherein to generate the plurality of hash values, the processor is further configured to generate a second hash value of the plurality of hash values dependent upon a first hash value of the plurality of hash values. ### Claim 16 (depends on 14) The system of claim 14, wherein the processor includes a plurality of counters, and wherein the processor is further configured to select the given prediction dependent upon a respective value of each counter of the plurality of counters. ### Claim 17 (depends on 16) The system of claim 16, wherein the processor is further configured to update a value of at least one counter dependent upon results of a search of one or more of the plurality of buffers dependent upon the given prediction. ### Claim 18 (depends on 17) The system of claim 17, wherein the processor is further configured to update information in an entry included in a given one of the plurality of memories corresponding to the given prediction dependent upon the results of the search. ### Claim 19 (depends on 14) The system of claim 14, wherein the processor is further configured to initiate a search, in parallel, of a subset of the plurality of buffers, in response to a determination that a confidence value included in the given prediction is less than a predetermined threshold value. ### Claim 20 (depends on 14) The system of claim 14, wherein the processor is further configured to initiate a sequential search of a subset of the plurality of buffers, in response to a determination that a confidence value included in the given prediction is greater than or equal to a predetermined threshold value.