# US 2018/0024774 A1 · Memory system and operating method thereof

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- Number: US 2018/0024774 A1
- Document ID: US20180024774A1
- Status: Published application
- Kind: A1
- Application number: 15/387,873
- Filed: 2016-12-22
- Published: 2018-01-25
- Earliest claimed: 2016-07-19
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Beom Ju SHIN
- Web page: https://patentgrep.com/patent/US20180024774A1

## CPC

- G06F 3/0659: {Command handling arrangements, e.g. command buffers, queues, command scheduling}
- G06F 3/061: {Improving I/O performance}
- G06F 3/0656: {Data buffering arrangements}
- G06F 3/0679: {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}
- G06F 13/1673: {using buffers}
- G06F 13/18: based on priority control (G06F13/1605 takes precedence)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A memory system includes a memory device including a plurality of command registers; and a memory controller configured to determine whether an empty command register exists among the plurality of command registers, and transmit a new command to the memory device, when an empty command register exists, wherein, when the new command is transmitted from the memory controller, the memory device stores the transmitted new command in the empty command register.

## Claims

### Claim 1

A memory system comprising:
a memory device including a plurality of command registers; and
a memory controller configured to determine whether an empty command register exists among the plurality of command registers, and transmit a new command to the memory device, when an empty command register exists,
wherein, when the new command is transmitted from the memory controller, the memory device stores the new command in the empty command register.

### Claim 2 (depends on 1)

The memory system according to claim 1, wherein the memory device further includes a command state register in which state informations for commands stored in the plurality of command registers are stored.

### Claim 3 (depends on 2)

The memory system according to claim 2, wherein the state information represents that the command of the respective command registers is execution-pending, in the process of being executed, or execution-completed.

### Claim 4 (depends on 3)

The memory system according to claim 3,
wherein the state information of the command stored in the respective command registers is updated according to current execution status of the command, and
wherein when the command becomes execution-completed, a corresponding one storing the execution-completed command among the command registers becomes empty.

### Claim 5 (depends on 4)

The memory system according to claim 4, wherein the memory controller determines whether or not to transmit the new command to the memory device according to the state information stored in the command state register.

### Claim 6

A memory system comprising:
a memory device; and
a memory controller configured to control an operation of the memory device,
wherein the memory device comprises:
plural command registers configured to store commands transmitted from the memory controller;
a command state register configured to store state information of the commands stored in the command registers, and
a control logic configured to store the transmitted command in an empty one of the command registers,
wherein the memory controller determines by checking the command state register whether an empty command register exists among the command registers, and transmits a new command to the memory device when an empty command register exists.

### Claim 7 (depends on 6)

The memory system according to claim 6, wherein the control logic suspends a lower priority command currently in the process of being executed and executes a higher priority command when the memory controller transmits the higher priority command to the memory device.

### Claim 8 (depends on 7)

The memory system according to claim 7, wherein the memory device further comprises a suspend condition register configured to store a register value representing a condition for suspending a command in the process of being executed.

### Claim 9 (depends on 8)

The memory system according to claim 8, wherein the control logic suspends the command in the process of being executed according to the register value of the suspend condition registers.

### Claim 10 (depends on 7)

The memory system according to claim 7, wherein the control logic suspends the command in the process of being executed when a suspend count of the command in the process of being executed is equal to or smaller than a predetermined suspend count.

### Claim 11 (depends on 6)

The memory system according to claim 6, wherein the state information represents that the command of the respective command registers is execution-pending, in the process of being executed, or execution-completed.

### Claim 12 (depends on 11)

The memory system according to claim 11, wherein the state information further represents that the command of the respective command registers is a pass or a fail.

### Claim 13 (depends on 6)

The memory system according to claim 6, wherein the memory device further comprises plural page buffers respectively corresponding to the command registers, and each configured to buffer data including a command stored in a corresponding command register.

### Claim 14

A method for operating a memory system including a memory device, which includes a plurality of command registers, and a memory controller, which controls an operation of the memory device, the method comprising:
determining whether an empty command register exists among the plurality of command registers;
transmitting a new command to the memory device when an empty command register exists; and
storing the transmitted command in the empty command register.

### Claim 15 (depends on 14)

The method according to claim 14, wherein the determining of whether an empty command register exists comprises determining whether a command, execution of which is completed, exists by checking state informations of commands stored in the plurality of command registers.

### Claim 16 (depends on 14)

The method according to claim 14, further comprising:
fetching and executing the commands stored in the plurality of command registers in a sequence in which they are transmitted;
determining whether a command of higher priority than a command currently in the process of being executed is transmitted;
suspending the command currently in the process of being executed when the command of higher priority is transmitted, and executing the command of higher priority; and
resuming the suspended command when execution of the command of higher priority is completed.

### Claim 17 (depends on 16)

The method according to claim 16, wherein the suspending of the currently executed includes:
comparing a suspend count of the command currently in the process of being executed and a predetermined suspend count; and
suspending the command currently in the process of being executed when the suspend count of the command currently in the process of being executed is equal to or smaller than the predetermined suspend count.

### Claim 18 (depends on 16)

The method according to claim 16, wherein the suspending of the command currently in the process of being executed is performed according to a suspend condition set in advance by the memory controller.

### Claim 19 (depends on 14)

The method according to claim 14, further comprising:
fetching and executing the commands stored in the plurality of command registers in a sequence in which they are transmitted;
determining whether a command of higher priority than a command currently in the process of being executed exists by checking the plurality of command registers;
suspending the command currently in the process of being executed when the command of higher priority exists, and executing the command of higher priority; and
resuming the suspended command when execution of the command of higher priority is completed.

### Claim 20 (depends on 19)

The method according to claim 19, wherein the suspending of the command currently in the process of being executed includes:
comparing a suspend count of the command currently in the process of being executed and a predetermined suspend count; and
suspending the command currently in the process of being executed when the suspend count of the command currently in the process of being executed is equal to or smaller than the predetermined suspend count.