# US 2018/0022602 A1 · Semiconductor arrangement and formation thereof

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 2018/0022602 A1
- Document ID: US20180022602A1
- Status: Published application
- Kind: A1
- Application number: 15/722,199
- Filed: 2017-10-02
- Published: 2018-01-25
- Earliest claimed: 2014-02-26
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company Limited
- Inventors: Hsin-Ting Huang; Hsiang-Fu Chen; Wen-Chuan Tai; Chia-Ming Hung; Shao-Chi Yu; Hung-Hua Lin; Yuan-Chih Hsieh
- Web page: https://patentgrep.com/patent/US20180022602A1

## CPC

- B81C 1/00301: {Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias}
- B81B 2207/07: Interconnects
- B81C 1/00269: {Bonding of solid lids or wafers to the substrate}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 72/00: Interconnections or connectors in packages
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.

## Claims

### Claim 1

A method of forming a semiconductor arrangement, comprising:
patterning an oxide layer to form a first oxide structure over a first metal connect and a second oxide structure over a second metal connect;
forming a first opening through the first oxide structure to expose a top surface of the first metal connect and a second opening through the second oxide structure to expose a top surface of the second metal connect;
forming a metal layer over the first oxide structure, over the second oxide structure, in the first opening, in the second opening, and in a micro electro-mechanical system (MEMS) area between the first oxide structure and the second oxide structure, wherein:
the metal layer is in contact with the top surface of the first metal connect through the first opening, and
the metal layer is in contact with the top surface of the second metal connect through the second opening;
removing the metal layer from the MEMS area; and
bonding a wafer comprising a MEMS device over the metal layer such that the MEMS device is disposed in the MEMS area.

### Claim 2 (depends on 1)

The method of claim 1, comprising:
forming a third opening through the wafer on a first side of the MEMS device and a fourth opening through the wafer on a second side of the MEMS device.

### Claim 3 (depends on 2)

The method of claim 2, comprising:
connecting a cap over the wafer from the first side of the MEMS device to the second side of the MEMS device.

### Claim 4 (depends on 3)

The method of claim 3, comprising:
forming an input/output (I/O) port on a top surface of the wafer that is not covered by the cap.

### Claim 5 (depends on 3)

The method of claim 3, comprising:
forming a first squish prevention node over the wafer and between the cap and the third opening.

### Claim 6 (depends on 3)

The method of claim 3, wherein connecting the cap comprises:
forming a first eutectic bond between the cap and a metal pad disposed over the wafer.

### Claim 7 (depends on 1)

The method of claim 1, wherein a vacancy is defined between the metal layer and the wafer in the first opening after bonding the wafer over the metal layer.

### Claim 8

A method of forming a semiconductor arrangement comprising:
forming an oxide layer over a first metal connect and a second metal connect disposed on a substrate;
patterning the oxide layer to form a first oxide structure over the first metal connect and a second oxide structure over the second metal connect;
forming a first metal layer over the first oxide structure and the second oxide structure, adjacent a sidewall of the first oxide structure, and contacting the substrate; and
bonding a wafer comprising a MEMS device over the first metal layer, wherein the MEMS device is disposed within a MEMS area between the first oxide structure and the second oxide structure.

### Claim 9 (depends on 8)

The method of claim 8, wherein patterning the oxide layer comprises:
patterning the oxide layer to define an opening through the first oxide structure to expose the first metal connect.

### Claim 10 (depends on 9)

The method of claim 9, wherein forming the first metal layer comprises:
forming the first metal layer in the opening to contact the first metal connect.

### Claim 11 (depends on 8)

The method of claim 8, wherein patterning the oxide layer comprises:
patterning the oxide layer to define a first bump structure within the MEMS area.

### Claim 12 (depends on 11)

The method of claim 11, wherein forming the first metal layer comprises:
forming the first metal layer over the first bump structure.

### Claim 13 (depends on 12)

The method of claim 12, comprising:
removing the first metal layer in the MEMS area to expose the first bump structure and a portion of the substrate underlying the MEMS area.

### Claim 14 (depends on 8)

The method of claim 8, wherein:
the first metal layer comprises titanium,
the wafer comprises silicon, and
bonding the wafer over the first metal layer comprises bonding the wafer to the first metal layer through a titanium-silicon bond.

### Claim 15 (depends on 8)

The method of claim 8, comprising:
forming a second metal layer over the wafer; and
patterning the second metal layer to define a bonding pad overlying the first oxide structure and a squish prevention node between the bonding pad and the MEMS device.

### Claim 16 (depends on 15)

The method of claim 15, comprising:
etching the wafer to define a squish prevention opening between the bonding pad and the squish prevention node.

### Claim 17 (depends on 15)

The method of claim 15, comprising:
connecting a cap extending over the MEMS area to the bonding pad.

### Claim 18 (depends on 17)

The method of claim 17, wherein:
the bonding pad comprises at least one of aluminum or copper,
the cap comprises a cap bonding pad comprising germanium, and
connecting the cap to the bonding pad comprises forming a eutectic bond between the at least one aluminum or copper of the bonding pad and the germanium of the cap bonding pad.

### Claim 19

A method of forming a semiconductor arrangement comprising:
forming an oxide layer over a first metal connect and a second metal connect disposed on a substrate;
patterning the oxide layer to form a first opening exposing the first metal connect and a second opening exposing the second metal connect;
forming a first metal layer in the first opening, in the second opening, and over the oxide layer;
bonding a wafer comprising a MEMS device to the first metal layer;
forming a second metal layer over the wafer; and
patterning the second metal layer to define a bonding pad and a squish prevention node between the bonding pad and the MEMS device.

### Claim 20 (depends on 19)

The method of claim 19, comprising:
connecting a cap to the bonding pad, wherein the cap extends over the MEMS device to cover the MEMS device.