# US 2018/0022220 A1 · Signal pin arrangement for multi-device power module > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2018/0022220 A1 - Document ID: US20180022220A1 - Status: Published application - Kind: A1 - Application number: 15/214,630 - Filed: 2016-07-20 - Published: 2018-01-25 - Earliest claimed: 2016-07-20 - Assignees: Ford Global Technologies, LLC - Applicants: Ford Global Technologies, LLC - Inventors: FAN XU; LIHUA CHEN - Web page: https://patentgrep.com/patent/US20180022220A1 ## CPC - B60L 50/51: characterised by AC-motors - H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections} - H02M 7/5387: in a bridge configuration - H05K 1/0265: {characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections} - H05K 1/0306: {Inorganic insulating substrates, e.g. ceramic, glass} - H05K 1/142: {Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit} - H05K 1/145: {Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules} - H05K 1/18: structurally associated with non-printed electric components (H05K1/16 takes precedence) - H05K 3/4015: {using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres} - H05K 2201/0397: Tab - H05K 2201/10272: Busbars, i.e. thick metal bars mounted on the printed circuit board [PCB] as high-current conductors - H10W 72/07354: {changes in dispositions} - H10W 72/347: {Dispositions of multiple die-attach connectors} - H10W 72/926: {Multiple bond pads having different sizes} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - Y02T 10/70: Energy storage systems for electromobility, e.g. batteries - B60L: PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES (arrangements or mounting of electrical propulsion units or of plural diverse prime-movers for mutual or common propulsion in vehicles B60K1/00, B60K6/20; arrangements or mounting of electrical gearing in vehicles B60K17/12, B60K17/14; preventing wheel slip by reducing power in rail vehicles B61C15/08; dynamo-electric machines H02K; control or regulation of electric motors H02P); SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES (electric coupling devices combined with mechanical couplings of vehicles B60D1/64; electric heating for vehicles B60H1/00); ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL (control or regulation of electric motors H02P); MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y02T: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION ## Abstract A power module provides one or more power transistors and support elements in a card shape. The pins/terminals for signal-level input/outputs (e.g., gate drive, current sensor, and temperature sensor signals) are arranged in two parallel layers. The power terminals (e.g., positive and negative bus, and output junction of a phase leg) are preferably arranged in just one of the layers. The signal pins are spaced both laterally across a long edge of the power module and transversely to the edge direction, so that the minimum spacings (i.e., clearances) can be achieved while shortening the lateral length of the edge(s) of the power module. Preferably, the signal pins belonging to an individual power transistor (e.g., an IGBT or MOSFET) are distributed between the two layers so that corresponding signal loops can be magnetically decoupled from the power terminal loop. ## Claims ### Claim 1 A power module comprising: a first insulating substrate having a bonded copper layer on a first side defining circuit traces, a plurality of first signal pins, and a plurality of power terminals, wherein the first signal pins and power terminal are coplanar and each cantilevers beyond an edge of the first substrate; at least one semiconductor chip containing a power transistor and having a side soldered to a respective circuit trace on the first substrate that extends to one of the power terminals; a second insulating substrate parallel to the first substrate and having a bonded copper layer on an interior side facing the first side and defining circuit traces and a plurality of second signal pins, wherein the second signal pins are coplanar and each cantilevers beyond an edge of the second substrate, wherein the chip includes a plurality of signal pads, wherein a first group of the signal pads are each connected to a respective first signal pin, and wherein a second group of the signal pads are each connected to a respective second signal pin; a plurality of spacers each soldered between the first side and the interior side; and an encapsulating body securing the substrates, chip, and spacers, wherein the signal pins and power terminals extend through the encapsulating body. ### Claim 2 (depends on 1) The module of claim 1 comprising a plurality of semiconductor chips soldered to respective circuit traces on the first and second substrates, wherein each chip contains a respective power transistor, and wherein power terminals for all the power transistors all extend from the first substrate. ### Claim 3 (depends on 1) The module of claim 1 wherein a pair of the signal pads are adapted to receive a gate drive signal for the power transistor, wherein the first group includes one of the pair of gate drive signal pads and the second group includes the other of the pair of gate drive signal pads. ### Claim 4 (depends on 3) The module of claim 3 wherein respective first and second signal pins connected to the pair of gate drive signal pads are transversely aligned with respect to the edge of the first substrate, whereby a magnetic field associated with a gate current in the first and second signal pins is oriented transverse to a magnetic field associated with a switched current in the power terminals. ### Claim 5 (depends on 1) The module of claim 1 wherein a pair of the signal pads are adapted to provide a chip temperature signal, wherein the first group includes one of the pair of temperature signal pads and the second group includes the other of the pair of temperature signal pads. ### Claim 6 (depends on 5) The module of claim 5 wherein respective first and second signal pins connected to the pair of temperature signal pads are transversely aligned with respect to the edge of the first substrate, whereby a magnetic field associated with a temperature signal in the first and second signal pins is oriented transverse to a magnetic field associated with a switched current in the power terminals. ### Claim 7 (depends on 1) The module of claim 1 wherein the first signal pins and the power terminals extend from opposite edges of the first substrate. ### Claim 8 (depends on 7) The module of claim 7 wherein the first and second signal pins extend from proximate edges of the first and second substrates, respectively. ### Claim 9 (depends on 1) The module of claim 1 wherein the first and second substrates each has an exterior side comprised of a bonder copper layer adapted to transfer heat generated in the power transistor. ### Claim 10 A phase leg for an inverter in an electric vehicle, comprising: a first insulating substrate having a bonded copper layer on a first side defining circuit traces, a plurality of first signal pins, and a plurality of power terminals, wherein the first signal pins and power terminal are coplanar and each cantilevers beyond an edge of the first substrate; a plurality of semiconductor chips each containing a respective power transistor and having a respective side soldered to a respective circuit trace on the first substrate that extends to one of the power terminals; a second insulating substrate parallel to the first substrate and having a bonded copper layer on an interior side facing the first side and defining circuit traces and a plurality of second signal pins, wherein the second signal pins are coplanar and each cantilevers beyond an edge of the second substrate, wherein the circuit traces connect respective power transistors in series with an intermediate junction providing a phase leg output, wherein each chip includes a plurality of signal pads, wherein a first group of the signal pads of each power transistor are each connected to a respective first signal pin, and wherein a second group of the signal pads of each power transistor are each connected to a respective second signal pin; a plurality of spacers each soldered between the first side and the interior side; and an encapsulating body securing the substrates, chips, and spacers, wherein the signal pins and power terminals extend through the encapsulating body. ### Claim 11 (depends on 10) The phase leg of claim 10 wherein a pair of the signal pads of each power transistor are adapted to receive a respective gate drive signal, and wherein each first group includes one of the pair of the respective gate drive signal pads and each second group includes the other of the pair of the respective gate drive signal pads. ### Claim 12 (depends on 11) The phase leg of claim 11 wherein respective first and second signal pins connected to each pair of gate drive signal pads are transversely aligned with respect to the edge of the first substrate, whereby a magnetic field associated with a gate current in the respective first and second signal pins is oriented transverse to a magnetic field associated with a switched current in the power terminals. ### Claim 13 (depends on 10) The phase leg of claim 10 wherein a pair of the signal pads of each chip are adapted to provide a chip temperature signal, wherein each first group includes one of the respective pair of temperature signal pads and each second group includes the other of the respective pair of temperature signal pads. ### Claim 14 (depends on 13) The phase leg of claim 13 wherein respective first and second signal pins connected to the respective pair of temperature signal pads are transversely aligned with respect to the edge of the first substrate, whereby a magnetic field associated with a respective temperature signal in the first and second signal pins is oriented transverse to a magnetic field associated with a switched current in the power terminals. ### Claim 15 (depends on 10) The phase leg of claim 10 wherein the first signal pins and the power terminals extend from opposite edges of the first substrate. ### Claim 16 (depends on 15) The phase leg of claim 15 wherein the first and second signal pins extend from proximate edges of the first and second substrates, respectively. ### Claim 17 (depends on 10) The phase leg of claim 10 wherein the first and second substrates each has an exterior side comprised of a bonder copper layer adapted to transfer heat generated in the power transistors. ### Claim 18 A power module comprising: a pair of spaced apart substrates having circuit traces connecting a plurality of signal pins and power terminals respectively thereon and coplanarly cantilevered beyond edges of the substrates; at least one semiconductor chip attached to a circuit trace on one of the substrates; a plurality of spacers between the substrates; and an encapsulating body; wherein spacing of paired signal pins and spacing of paired power terminals are transverse for magnetic decoupling. ### Claim 19 (depends on 18) The power module of claim 18 wherein the signal pins and power pins extend through the encapsulating body.