Timeslot shifting for lower-priority packet in a time slotted network

An apparatus comprising:

• a processor circuit configured for identifying, in a time slotted network allocated timeslots for exclusive control of data transmissions, a first schedule of first timeslots allocated for transmission and reception of packets having a first priority and a second schedule of second timeslots allocated for transmission and reception of packets having a second priority lower than the first priority, the second schedule overlapping the first schedule;
• the processor circuit further configured for shifting the second schedule of timeslots, relative to the first schedule, by a slot-frame shift (SFS) interval that causes a corresponding listen-before-talk interval in each of the second timeslots to be initiated coincident with or after transmission is enabled for any packet having the first priority;
• and
• a device interface circuit configured for transmitting one of the packets having the second priority, within a corresponding second timeslot, in response to a determined absence during the corresponding listen-before-talk interval in the corresponding second timeslot of any packet having the first priority.