US 2018/0019343 A1 · SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Abstract

A semiconductor device in which parasitic capacitance is reduced is provided. A semiconductor device comprising a first insulating layer, a first oxide semiconductor layer over the first insulating layer, a second oxide semiconductor layer over the first oxide semiconductor layer, a source electrode layer and a drain electrode layer over the second oxide semiconductor layer, a second insulating layer over the first insulating layer, the source electrode layer, and the drain electrode layer, a third insulating layer over the second insulating layer, a third oxide semiconductor layer over the second oxide semiconductor layer, a gate insulating layer over the third oxide semiconductor, and a gate electrode layer over the gate insulating layer. The second insulating layer is an oxygen barrier layer and includes a region in contact with side surfaces of the first oxide semiconductor layer, the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer. The third oxide semiconductor layer includes a region in contact with side surfaces of the second oxide semiconductor layer, the source electrode layer, the drain electrode layer, the second insulating layer, and the third insulating layer.

Claims18

Dependent claims

A semiconductor device comprising:

a first insulating layer;
a first oxide semiconductor layer over the first insulating layer;
a second oxide semiconductor layer over the first oxide semiconductor layer;
a source electrode layer and a drain electrode layer over the second oxide semiconductor layer;
a second insulating layer over the first insulating layer, the source electrode layer, and the drain electrode layer;
a third insulating layer over the second insulating layer;
a third oxide semiconductor layer over the second oxide semiconductor layer;
a gate insulating layer over the third oxide semiconductor layer;
and
a gate electrode layer over the gate insulating layer,
wherein the second insulating layer is an oxygen barrier layer and comprises a region in contact with a side surface of the first oxide semiconductor layer, a side surface of the second oxide semiconductor layer, a side surface of the source electrode layer, and a side surface of the drain electrode layer, and
wherein the third oxide semiconductor layer comprises a region in contact with the side surface of the second oxide semiconductor layer, the side surface of the source electrode layer, the side surface of the drain electrode layer, the side surface of the second insulating layer, and the side surface of the third insulating layer.

9 more elements

A method for manufacturing a semiconductor device, comprising:

forming a first insulating layer;
forming a first oxide semiconductor film over the first insulating layer;
forming a second oxide semiconductor film over the first oxide semiconductor film,
performing first heat treatment;
forming a first conductive film over the second oxide semiconductor film;
partly etching the first oxide semiconductor film and the second oxide semiconductor film with a first mask and the first conductive film to form a first oxide semiconductor layer and a second oxide semiconductor layer having island shapes;
forming a second insulating layer over the first insulating layer and the first conductive film;
forming a mixed layer of the first insulating layer and the second insulating layer, and at the same time, adding oxygen to the mixed layer or the first insulating layer when the second insulating layer is formed;
performing second heat treatment to diffuse the oxygen into the second oxide semiconductor layer;
forming a third insulating film over the second insulating layer;
performing planarization treatment on the third insulating film to form a third insulating layer;
selectively etching the third insulating layer and the second insulating layer with a second mask;
selectively etching the first conductive film with the second mask and the second insulating layer to form a source electrode layer and a drain electrode layer;
forming a third oxide semiconductor film over the third insulating layer and the second oxide semiconductor layer;
forming a fourth insulating film over the third oxide semiconductor film;
forming a second conductive film over the fourth insulating film;
and
performing chemical mechanical polishing treatment on the second conductive film, the third insulating film, and the third oxide semiconductor film to form a third oxide semiconductor layer, a gate insulating layer, and a gate electrode layer.

15 more elements

A method for manufacturing a semiconductor device, comprising:

forming a first insulating layer;
forming a first oxide semiconductor film over the first insulating layer;
forming a second oxide semiconductor film over the first oxide semiconductor film;
performing first heat treatment,
forming a first conductive film over the second oxide semiconductor film;
selectively etching the first oxide semiconductor film and the second oxide semiconductor film with a first mask and the first conductive film to form a first oxide semiconductor layer and a second oxide semiconductor layer having island shapes;
forming a second insulating film over the first insulating layer and the first conductive film,
forming a mixed layer of the first insulating layer and the second insulating film and adding oxygen to the mixed layer or the first insulating layer when the second insulating film is formed;
performing second heat treatment to diffuse the oxygen into the second oxide semiconductor layer;
forming a third insulating film over the second insulating film,
performing planarization treatment on the third insulating film;
partly etching the third insulating film and the second insulating film with a second mask to form a third insulating layer and a second insulating layer;
forming a fourth insulating film over the first conductive film and the third insulating layer;
anisotropically etching to form a fourth insulating layer in contact with side surfaces of the second insulating layer and the third insulating layer;
partly etching the first conductive film using the fourth insulating layer as a mask to form a source electrode layer and a drain electrode layer;
forming a third oxide semiconductor film over the third insulating layer and the second oxide semiconductor layer;
forming a fifth insulating film over the third oxide semiconductor film,
forming a second conductive film over the fifth insulating film;
and
performing chemical mechanical polishing treatment on the second conductive film, the third insulating film, and the third oxide semiconductor film to form a third oxide semiconductor layer, a gate insulating layer, and a gate electrode layer.

17 more elements

Dependencies are inferred from the claim text.

Semiconductor device and manufacturing method thereof

Life of this patent

Semiconductor device and manufacturing method thereof

Life of this patent

Abstract

Claims18