Method and structure of forming self-aligned rmg gate for vfet
AssigneeGlobalfoundries Inc.
InventorsRuilong XIE, Chanro PARK, Min Gyu SUNG, Hoon KIM
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Abstract
An intermediate semiconductor structure in fabrication includes a silicon semiconductor substrate, a hard mask of silicon nitride (SiN) over the substrate and a sacrificial layer of polysilicon or amorphous silicon over the hard mask. The sacrificial layer is patterned into sidewall spacers, each of the sidewall spacers having vertically tapered inner and outer sidewalls providing a rough triangular shape. The rough triangular sidewall spacers are used as a temporary hard mask to pattern the SiN hard mask.
Claims13
An intermediate semiconductor structure comprising a fin structure comprising a fin above a substrate adjacent a bottom source or drain;
- a top source or drain located on the top of the fin;
- a top spacer located above and surrounding said top source or drain and adjacent a top portion of said fin;
- a self-aligned gate structure located below said top spacer and above a bottom spacer located above said substrate and source or drain;
- and
- one or more work function layers located between said bottom spacer and side walls of said fin and top spacer.
Dependencies are inferred from the claim text.