Three-dimensional semiconductor integrated circuit device and method of manufacturing the same
AssigneeSK hynix Inc.
InventorsDong Yean OH, Sang Yong KIM
Life of this patent
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Abstract
A semiconductor integrated circuit device may include an isolating layer, a buried gate, source and drain regions, a dielectric layer having a high dielectric constant and an insulating interlayer. The isolating layer may be formed on a semiconductor substrate to define an active region. The buried gate may be formed in the active region of the semiconductor substrate. The source and drain regions may be formed in the active region at both sides of the buried gate. The dielectric layer may be configured to surround the source and drain regions. The insulating interlayer may be formed on the dielectric layer.
Claims20
A semiconductor integrated circuit device comprising:
- an isolating layer formed on a semiconductor substrate to define an active region;
- a buried gate formed in the active region of the semiconductor substrate;
- source and drain regions formed in the active region at both sides of the buried gate;
- a dielectric layer having a high dielectric constant, configured to surround the source and drain regions;
- and
- an insulating interlayer formed on the dielectric layer.
A method of manufacturing a semiconductor integrated circuit device, the method comprising:
- forming an isolating layer on a semiconductor substrate to define an active region;
- etching the active region to form a groove;
- forming a gate insulating layer on an inner surface of the groove;
- forming a buried gate in a lower region of the groove;
- implanting donors into the active region exposed through the buried gate;
- forming a dielectric layer having a high dielectric constant and an insulating property, on an upper surface of the isolating layer, a surface of the active region and an upper surface of the buried gate;
- activating the donors in the active region with the dielectric layer covering the active region having the donors, to form a source region and a drain region;
- and
- forming an insulating interlayer on the dielectric layer.
A method of manufacturing a semiconductor integrated circuit device, the method comprising:
- providing an active region into which donors are implanted;
- forming a dielectric layer having a high dielectric constant to surround the active region;
- and
- activating the donors in the active region with the dielectric layer covering the active region into which the donors are implanted.
Dependencies are inferred from the claim text.