Common metal contact regions having different schottky barrier heights and methods of manufacturing same

A device comprising:

• a substrate having an n-FET region and a p-FET region separated by a shallow trench isolation (STI) region, each of the n-FET and p-FET regions including a gate between source/drain regions;
• an interlayer dielectric (ILD) over the substrate, with trenches formed through the ILD down to the source/drain regions;
• a dopant implanted into the p-FET region source/drain regions through the trenches in the ILD, wherein a surface of the p-FET region source/drain regions is amorphized;
• and
• a titanium-based metal formed in the trenches over the n-FET and p-FET region source/drain regions.

A device, comprising:

• a semiconductor substrate having an n-FET region and a p-FET region each having source/drain regions;
• a titanium silicon (Ti—Si) intermix phase Ti liner on an upper surface of the n-FET region source/drain regions;
• and
• titanium silicide (TiSi) forming an upper surface of the p-FET region source/drain regions,
• wherein the n-FET region exhibits a first Schottky barrier height (SBH), and the p-FET region exhibits a second SBH that is different from the first SBH.