Electronic device
AssigneeRenesas Electronics Corporation
InventorsYoichiro KURITA, Masaya KAWANO, Koji SOEJIMA
Life of this patent
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Abstract
In a conventional electronic device and a method of manufacturing the same, reduction in cost of the electronic device is hindered because resin used in an interconnect layer on the solder ball side is limited. The electronic device includes an interconnect layer (a first interconnect layer) and an interconnect layer (a second interconnect layer). The second interconnect layer is formed on the undersurface of the first interconnect layer. The second interconnect layer is larger in area seen from the top than the first interconnect layer and is extended to the outside from the first interconnect layer.
Claims1
A semiconductor device comprising:
- a first wiring substrate having a first obverse surface, a first reverse surface opposite the first obverse surface, a plurality of first wirings formed in the first wiring substrate, and a plurality of external electrodes formed on the first reverse surface;
- a second wiring substrate arranged as an interposer having a second obverse surface, a second reverse surface opposite the second obverse surface, and a wiring layer arranged closer to the second obverse surface than the second reverse surface, the second wiring substrate disposed on the first obverse surface of the first wiring substrate such that the second reverse surface faces the first obverse surface of the first wiring substrate;
- a first semiconductor chip having a first main surface, a first rear surface opposite the first main surface, and a plurality of first electrodes formed on the first main surface, the first semiconductor chip mounted on the second obverse surface of the second wiring substrate such that the first main surface faces the second obverse surface of the second wiring substrate via a first underfill material;
- and
- a second semiconductor chip having a second main surface and a plurality of second electrodes formed on the second main surface, the second semiconductor chip mounted side by side with the first semiconductor chip on the second obverse surface of the second wiring substrate such that the second main surface faces the second obverses surface of the second wiring substrate via a second underfill material.
Dependencies are inferred from the claim text.