Semiconductor Device and Method of Manufacture
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsien-Wei Chen, Ying-Ju Chen, An-Jhih Su, Jie Chen
Life of this patent
Estimating the term…
Abstract
A semiconductor device and method that utilize a surface device are provided. In an embodiment a fuse line comprises an underbump metallization which has two separate, electrically isolated parts. The two parts are bridged by an external connector, such as a solder ball in order to electrically connect the surface device. When, after testing, the surface device is determined to be defective, the fuse line may be disconnected by removing the external connector from the two separate parts, electrically isolating the surface device. In another embodiment the surface is located beneath a package within an integrated fan out package or is part of a multi-fan out package.
Claims20
A semiconductor device, comprising:
- a first redistribution layer (RDL) having a first portion and a second portion electrically isolated from the first portion of the first RDL;
- a first device coupled to a first side of the first RDL;
- a passivation layer disposed between the device and the first side of the first RDL;
- a second device coupled to a second side of the first RDL opposite the first side of the first RDL, the second device having first terminals bonded to the first portion of the first RDL, the second device having second terminals bonded to the second portion of the first RDL;
- and
- a semiconductor package disposed over the second device such that the second device is disposed between the passivation layer and the semiconductor package even when the second device has failed a device test.
A semiconductor device, comprising:
- vias that extend through an encapsulant and are separated from a device by the encapsulant;
- a passivation layer over the vias, the encapsulant, and the device;
- a surface device located over the passivation layer;
- and
- a semiconductor package located over the surface device such that the surface device is between the passivation layer and the semiconductor package, and wherein the surface device has failed a device test and is electrically separated from the semiconductor package.
A semiconductor device, comprising:
- a first redistribution layer having a first portion and a second portion electrically isolated from the first portion;
- a first semiconductor device located on a first side of the first redistribution layer;
- a second semiconductor device located on a second side of the first redistribution layer opposite the first side of the first redistribution layer;
- a first one of a first via extending away from the first portion of the first redistribution layer in a first direction, wherein the first via is separated from the first semiconductor device by a first encapsulant;
- a second one of the first via extending away from the second portion of the first redistribution layer in the first direction;
- a second via extending away from the first redistribution layer in a second direction opposite the first direction, wherein the second via is separated from the second semiconductor device by a second encapsulant, wherein the first via extends through the first encapsulant and the second via extends through the second encapsulant;
- and
- a first surface mount device bonded to the first one of the first via and the second one of the second via, wherein the first surface mount device remains bonded over the first one of the first via and the second one of the second via after the first surface device fails a device test.
Dependencies are inferred from the claim text.