Low Parasitic Surface Mount Circuit Over Wirebond IC
AssigneeSemtech Corporation
InventorJean-Marc Papillon
Life of this patent
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Abstract
A semiconductor device has an interposer and a surface mount technology (SMT) component disposed on the interposer. The interposer is disposed on an active surface of a semiconductor die. The semiconductor die is disposed on a substrate. A first wire bond connection is formed between the interposer and semiconductor die. A second wire bond connection is formed between the interposer and substrate. A third wire bond connection is formed between the substrate and semiconductor die. An encapsulant is deposited over the substrate, semiconductor die, interposer, and SMT component. In one embodiment, the substrate is a quad flat non-leaded substrate. In another embodiment, the substrate is a land-grid array substrate, ball-grid array substrate, or leadframe.
Claims25
A method of making a semiconductor device, comprising:
- providing an interposer;
- disposing a surface mount component over the interposer;
- providing a semiconductor die;
- disposing the interposer over the semiconductor die;
- and
- forming a first bond wire between the interposer and semiconductor die.
A method of making a semiconductor device, comprising:
- providing an interposer;
- disposing a surface mount component on the interposer;
- providing a semiconductor die;
- and
- disposing the interposer on an active surface of the semiconductor die.
A semiconductor device, comprising:
- a semiconductor die;
- an interposer disposed on an active surface of the semiconductor die;
- a surface mount component disposed on the interposer;
- and
- a first bond wire coupled between the interposer and semiconductor die.
A semiconductor device, comprising:
- a semiconductor die;
- an interposer disposed on an active surface of the semiconductor die;
- and
- a surface mount component disposed on a surface of the interposer.
Dependencies are inferred from the claim text.