Method of integrating a copper plating process in a through-substrate-via (tsv) on cmos wafer

A semiconductor device, comprising:

• a semiconductor substrate having a front surface and a back surface, and comprising a metallization structure at the front surface, and an active device layer within the semiconductor substrate and adjacent to the metallization structure, the metallization structure comprising first and second barrier layers spaced apart from one another;
• and
• a copper interconnect filling a through-substrate-via (TSV) that extends through the semiconductor substrate from the back surface through the active device layer and the first barrier layer to the second barrier layer of the metallization structure.