US 2018/0019132 A1 · Method for Producing a Superjunction Device

Abstract

Disclosed is a method that includes forming a plurality of semiconductor arrangements one above the other. In this method, forming each of the plurality of semiconductor arrangements includes: forming a semiconductor layer; forming a plurality of trenches in a first surface of the semiconductor layer; and implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches of the semiconductor layer.

Claims25

Dependent claims

A method, comprising:

forming at least one semiconductor arrangement, wherein forming the at least one semiconductor arrangement includes forming a semiconductor layer;
forming a plurality of trenches in a first surface of the semiconductor layer;
and
implanting dopant atoms of at least one of a first type and a second type into at least one of a first sidewall and a second sidewall of each of the plurality of trenches of the semiconductor layer.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

15/648,987Filed 13 Jul 2017

Priority

DE 102016112970.414 Jul 2016

Published

18 Jan 2018

Term ends

Not estimatedThe source records don’t support an estimate.

Classification13 codes

H10P 30/222
Into semiconductor materials, e.g. for doping: characterised by the angle between the ion beam and the crystal planes or the main crystal surface
H10D 30/0291
Of double-diffused metal oxide semiconductor [DMOS] FETs: of vertical dmos [vdmos] fets
H10D 30/0297
Of vertical dmos [vdmos] fets: using recessing of the gate electrodes, e.g. to form trench gate electrodes
H10D 30/66
Double-diffused metal-oxide semiconductor [DMOS] FETs: vertical dmos [vdmos] fets

Method for Producing a Superjunction Device

Life of this patent

Method for Producing a Superjunction Device

Life of this patent

Abstract

Claims25