Command arbitration for high speed memory interfaces

A data processing system, comprising:

• a memory accessing agent for providing memory access requests;
• a memory system;
• and
• a memory controller coupled to said memory accessing agent and said memory system, comprising:
• a command queue for storing memory access commands received from said memory accessing agent;
• and
• an arbiter comprising a plurality of sub-arbiters for providing a corresponding plurality of sub-arbitration winners from among said memory access requests during a controller cycle, and for selecting among said plurality of sub-arbitration winners to provide a plurality of memory commands in a corresponding controller cycle.

A method, comprising:

• receiving a plurality of memory access requests;
• storing said plurality of memory access requests in a command queue;
• and
• selecting memory access requests from said command queue wherein said selecting comprises:
• selecting a plurality of sub-arbitration winners from among said memory access requests during a first controller cycle;
• and
• selecting among said plurality of sub-arbitration winners to provide a plurality of memory commands in a corresponding plurality of memory command cycles.