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US 2018/0018219 A1Published application
Semiconductor devices and semiconductor systems
AssigneeSK hynix Inc.
InventorsChang Hyun KIM, Do Yun LEE
Life of this patent
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Abstract
A semiconductor system including a first semiconductor device and a second semiconductor device may be provided. The first semiconductor device may be configured to outputs commands and addresses. The first semiconductor device may be configured to output or receive data. The second semiconductor device may be configured to store addresses of output data having an erroneous bit and the output data in memory cells during a read operation and perform an error scrub operation.
Claims23
A semiconductor system comprising:
- a first semiconductor device configured to output commands and addresses and configured to output or receive data;
- and
- a second semiconductor device configured to correct errors of output data to store the corrected output data and the addresses corresponding to the output data having the error if the errors are included in the output data to be outputted as the data while a read operation is performed based on the commands and the addresses and configured to perform an error scrub operation using the corrected and stored output data and the stored addresses during a predetermined operation.
A semiconductor device comprising:
- a control circuit configured to generate an active signal, row addresses, an enablement signal and a column selection signal during a predetermined operation and configured to generate a selection signal based on a flag signal if a combination of latch addresses is consistent with a combination of addresses;
- a storage circuit configured to store output data based on the flag signal, configured to latch the addresses to generate the latch addresses based on the flag signal, configured to output the output data as internal data based on the selection signal, and configured to output the latch addresses as column addresses based on the selection signal;
- and
- a memory area configured to detect errors of the output data to generate the flag signal and configured to perform an error scrub operation that stores the internal data into memory cells which are selected by the row addresses and the column addresses based on the active signal, the enablement signal and the column selection signal.
1 more element
A semiconductor system comprising:
- a first semiconductor device configured to output commands and addresses and configured to output or receive data;
- and
- a second semiconductor device configured to store addresses of output data having an erroneous bit and the output data in memory cells during a read operation based on the commands and the addresses and perform an error scrub operation restoring the stored output data in the memory cells during a predetermined operation.
Dependencies are inferred from the claim text.