Loading patent…
AssigneeFreescale Semiconductor, Inc.
InventorsHARSIMRAN SINGH, NEERAJ CHANDAK, SNEHLATA GUTGUTIA, VIVEK SINGH
Estimating the term…
A memory controller receives first and second write transactions from a processor and stores write data in a memory. The memory controller includes an address comparison circuit, a buffer, a level control circuit, a command generator, and a control circuit. The address comparison circuit compares second and third addresses and outputs first and second write data when the second and third addresses are consecutive. The buffer stores the first and second write data and outputs buffered data based on a control signal. The level control circuit compares a size of the buffered data with a threshold size and the size of the buffer. The command generator causes a write transaction to be executed based on the comparison results, rather than having the processor initiate the transaction, which reduces the load on the processor, and the buffered write data is stored in the memory.
An integrated circuit (IC), comprising:
A memory controller for executing first and second write transactions and storing first and second write data in a memory, wherein the memory controller is connected to a processor that provides the first and second write transactions and the first and second write data, and wherein the first write transaction includes first write control data, a first address, and the first write data and the second write transaction includes second write control data, a second address, and the second write data, the memory controller comprising:
Dependencies are inferred from the claim text.