Power management in scenarios that handle asynchronous stimulus

A method for power management, comprising:

• receiving one or more state signals, each of the one or more state signals indicating whether a respective sub-block of a memory controller is idle or active;
• determining whether to place the memory controller in an idle state or an active state based on the one or more state signals;
• eating pulses of an input clock signal to produce a reduced-frequency clock signal if a determination is made to place the memory controller in the idle state, wherein the reduced-frequency clock signal is output to the memory controller;
• and
• passing the input clock signal to the memory controller if a determination is made to place the memory controller in the active state.

An apparatus for power management, comprising:

• means for receiving one or more state signals, each of the one or more state signals indicating whether a respective sub-block of a memory controller is idle or active;
• and
• means for determining whether to place the memory controller in an idle state or an active state based on the one or more state signals;
• means for eating pulses of an input clock signal to produce a reduced-frequency clock signal if a determination is made to place the memory controller in the idle state;
• means for outputting the reduced-frequency clock signal to the memory controller;
• and
• means for passing the input clock signal to the memory controller if a determination is made to place the memory controller in the active state.