Compression of indirection tables

Abstract

In general, techniques are described for compressing an indirection table. A device comprising a processor and a memory may be configured to perform the techniques. The processor may be configured to form a plurality of physical containers, each of the plurality of physical containers representative of a plurality of physical block addresses, wherein each of the plurality of physical containers corresponds to one or more logical block address. The memory may be configured to store an indirection table that maps the logical block addresses to the plurality of physical containers. The processor may be further configured to perform run-length encoding of the plurality of physical containers to compress the indirection table.

Dependencies are inferred from the claim text.