Reducing purging of structures associated with address translation
AssigneeInternational Business Machines Corporation
InventorsJonathan D. Bradbury, Lisa Cranton Heller, Christian Jacobi, Anthony Saporito
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Abstract
Selective purging of a structure associated with address translation, such as a translation look-aside buffer. When purging of entries of a structure relating to a virtual processor executing on a physical processor is requested, it is determined whether the physical processor may refrain from such purging. A check is made as to whether purging has previously been performed on this physical processor for this virtual processor, and if so, the physical processor may refrain from purging.
Claims20
A computer program product for managing purging of structures associated with address translation, said computer program product comprising:
- a computer readable storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
- obtaining a tracking structure for a virtual processor executing on a current physical processor, the tracking structure tracking which physical processors of a plurality of physical processors are to perform a purging operation for this virtual processor on a structure associated with address translation;
- and
- selectively performing, by the current physical processor on which the virtual processor is executing, the purging operation on the structure associated with address translation, the selectively performing being based on the tracking structure, wherein the selectively performing refrains from performing the purging operation based on the tracking structure indicating the purging operation is not to be performed.
A computer system for managing purging of structures associated with address translation, said computer system comprising:
- a memory;
- and
- a processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising:
- obtaining a tracking structure for a virtual processor executing on a current physical processor, the tracking structure tracking which physical processors of a plurality of physical processors are to perform a purging operation for this virtual processor on a structure associated with address translation;
- and
- selectively performing, by the current physical processor on which the virtual processor is executing, the purging operation on the structure associated with address translation, the selectively performing being based on the tracking structure, wherein the selectively performing refrains from performing the purging operation based on the tracking structure indicating the purging operation is not to be performed.
A computer-implemented method of managing purging of structures associated with address translation, said computer-implemented method comprising:
- obtaining a tracking structure for a virtual processor executing on a current physical processor, the tracking structure tracking which physical processors of a plurality of physical processors are to perform a purging operation for this virtual processor on a structure associated with address translation;
- and
- selectively performing, by the current physical processor on which the virtual processor is executing, the purging operation on the structure associated with address translation, the selectively performing being based on the tracking structure, wherein the selectively performing refrains from performing the purging operation based on the tracking structure indicating the purging operation is not to be performed.
Dependencies are inferred from the claim text.