Protected container key management processors, methods, systems, and instructions
AssigneeIntel Corporation
InventorsMona Vij, Somnath Chakrabarti, Carlos V. Rozas, Asit K. Mallick
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AssigneeIntel Corporation
InventorsMona Vij, Somnath Chakrabarti, Carlos V. Rozas, Asit K. Mallick
Estimating the term…
A processor of an aspect includes a decode unit to decode an instruction. The instruction to indicate a first structure in a protected container memory and to indicate a second structure in the protected container memory. The processor also includes an execution unit coupled with the decode unit. The execution unit, in response to the instruction, is to determine whether a status indicator is configured to allow at least one key to be exchanged between the first and second structures, and is to exchange the at least one key between the first and second structures when the status indicator is configured to allow the at least one key to be exchanged between the first and second structures.
A processor comprising:
A method performed by a processor comprising:
A processor comprising:
A system to process instructions comprising:
Dependencies are inferred from the claim text.