Clock data recovery circuit using pseudo random binary sequence pattern and operating method for same

A method of operating a clock data recovery circuit including a digitally controlled oscillator (DCO), the method comprising:

• receiving a pseudo random binary sequence (PRBS) pattern;
• generating a counter clock from the PRBS pattern;
• recovering a clock of the DCO (DCO clock) with reference to the counter clock;
• recovering data from the PRBS pattern with reference to the DCO clock;
• and
• recovering serial data from externally provided serial data.

A method of operating a data communication system, the method comprising:

• providing parallel data from a first link layer to a transmission circuit;
• converting the parallel data into corresponding serial data in the transmission circuit;
• transmitting a pseudo random binary sequence (PRBS) pattern and the serial data from the transmission circuit to a reception circuit including a clock data recovery circuit via a channel;
• and
• using the clock data recovery circuit to recover the serial data by performing at least one of a frequency tracking operation, a phase tracking operation, an equalizing operation, a symbol alignment operation, and a bit error rate check operation with reference to the PRBS pattern.