Integrated circuits with hybrid fixed/configurable clock networks

A method of manufacturing an integrated circuit, comprising:

• forming a clock source;
• forming configurable clock routing paths that receive clock signals from the clock source, wherein the configurable clock routing paths are routed through a plurality of 4:1 multiplexers coupled in series;
• forming fixed clock routing paths that receive the clock signals from the configurable clock routing paths;
• and
• forming a register that receives the clock signals from the fixed clock routing paths.

Hybrid clock distribution circuitry, comprising:

• an input that receives a clock signal;
• a configurable clock network that receives the clock signal and that routes the clock signal to a clock tree root;
• and
• a fixed clock network that receives the clock signal from the clock tree root and that routes the clock signal to a clock tree leaf node, wherein the configurable clock network and the fixed clock network are implemented using an array of logic sectors, and wherein each logic sector in the array comprises a plurality of multiplexers configured to receive the same input signals and to route signals to four different adjacent logic sectors in the array.