Low supply class ab output amplifier
AssigneeIntel IP Corporation
InventorJohn G. Kauffman
Life of this patent
Estimating the term…
Abstract
An apparatus is provided which comprises: a differential input amplifying stage including a current source and a first node; a first matched pair of transistors coupled to the first node, wherein one of the transistors of the first matched pair is coupled to an output node of a driving stage; a second matched pair of transistors coupled to a second node to bias the second matched pair of transistors, wherein one of the transistors of the second matched pair of transistors is coupled to the output node of the driving stage, and wherein the second node is to be charged according to a first bias of the current source; and a resistive device coupled to the first and second nodes.
Claims21
An apparatus comprising:
- a differential input amplifying stage including a current source and a first node;
- a first matched pair of transistors coupled to the first node, wherein one of the transistors of the first matched pair is coupled to an output node of a driving stage;
- a second matched pair of transistors coupled to a second node to bias the second matched pair of transistors, wherein one of the transistors of the second matched pair of transistors is coupled to the output node of the driving stage, and wherein the second node is to be charged according to a first bias of the current source;
- and
- a resistive device coupled to the first and second nodes.
An apparatus comprising:
- an amplifier operable to provide class AB output, wherein the amplifier includes:
- a differential amplifier stage having a stack of three transistors including a current source between a supply node and a ground node;
- and
- a current sensor coupled to a driving stage, together coupled to the differential amplifier stage, wherein the current sensor and the driving stage have no more than two transistors in a stack between the supply node and the ground node.
A system comprising:
- an antenna;
- an integrated circuit (IC) coupled to the antenna, the IC including a sigma-delta modulator comprising:
- a loop filter having at least two integrators;
- and
- an analog-to-digital converter (ADC) to quantize an output of the loop filter into a digital representation, the ADC including an amplifier having a class AB output, wherein the amplifier includes:
- a differential input amplifying stage including a current source and a first node;
- a first matched pair of transistors coupled to the first node, wherein one of the transistors of the first matched pair is coupled to an output node of a driving stage;
- a second matched pair of transistors coupled to a second node to bias the second matched pair of transistors, wherein one of the transistors of the second matched pair of transistors is coupled to the output node of the driving stage, and wherein the second node is to be charged according to a first bias of the current source;
- and
- a resistive device coupled to the first and second nodes;
- and
- a processor coupled to the IC.
Dependencies are inferred from the claim text.