Electrostatic discharge memristive element switching
AssigneeHewlett Packard Enterprise Development LP
InventorsBrent Buchanan, Richard J. Auletta, Ning Ge
Life of this patent
Estimating the term…
Abstract
In the examples provided herein, an electrostatic discharge (ESD) recording circuit has a first memristive element coupled to a pin of an integrated circuit. The first memristive element switches from a first resistance to a second resistance when an ESD event occurs at the pin, and the first resistance is less than the second resistance. The ESD recording circuit also has shunting circuitry to shunt energy from an additional ESD event away from the first memristive element.
Claims15
An electrostatic discharge (ESD) recording circuit comprising:
- first memristive element coupled to a pin of an integrated circuit, wherein the first memristive element switches from a first resistance to a second resistance when an ESD event occurs at the pin, wherein the first resistance is less than the second resistance;
- and
- shunting circuitry to shunt energy from an additional ESD event away from the first memristive element.
The ESD recording circuit of claim w herein the shunting circuitry comprises a first resistive element in parallel with the first memristive element that has a third resistance greater than the first resistance and less than the second resistance, and the ESD recording circuit further comprises a first transistor,
- wherein a first terminal of the first memristive element and a first terminal of the first resistive element are coupled at a first node, and a second terminal of the first memristive element and a second terminal of the first resistive element are coupled at a second node,
- wherein the pin and circuitry of the integrated circuit to be protected from the ESD event are coupled to the first node,
- wherein a first drain terminal of the first transistor is coupled to the second node, and
- further wherein a first gate terminal and a first source terminal to the first transistor are coupled to ground.
A method comprising:
- determining a resistance of a memristive element, wherein the memristive element is coupled to a pin of an integrated circuit;
- and
- determining from the resistance whether an ESD event occurred at the pin, wherein the resistance falling within a first range of resistance values indicates no ESD event has occurred, and the resistance falling within a second range of resistance values indicates at least one ESD event occurred at the pin.
A method comprising:
- manufacturing a memristive element as part of an integrated circuit;
- manufacturing a resistive element in parallel with the memristive element as part of the integrated circuit, wherein a first terminal of the memristive element and a first terminal of the resistive element are coupled at a first node, and a second terminal of the memristive element and a second terminal of the resistive element are coupled at a second node;
- manufacturing a first transistor as part of the integrated circuit, wherein a drain terminal of the first transistor is coupled to the second node, and further wherein a gate terminal and a source terminal of the first transistor are coupled to ground;
- and
- coupling a pin of the integrated circuit to the first node.
Dependencies are inferred from the claim text.