Ldmos transistor and fabrication method thereof
AssigneesSemiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
InventorMeng ZHAO
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Abstract
Lateral double-diffused MOSFET transistor and fabrication method thereof are provided. A shallow trench isolation structure is formed in a semiconductor substrate. A drift region is formed in the semiconductor substrate and surrounding the shallow trench isolation structure. A body region is formed in the semiconductor substrate and distanced from the drift region. A gate structure is formed on a portion of each of the body region, the drift region, and the shallow trench isolation structure. A drain region is formed in the drift region on one side of the gate structure. A source region is formed in the body region on an other side of the gate structure. A first shallow doped region is formed in the drain region and the drift region to surround the shallow trench isolation structure.
Claims20
A method of forming a lateral double-diffused MOSFET (LDMOS) transistor, comprising:
- forming a shallow trench isolation structure in a semiconductor substrate;
- forming a drift region in the semiconductor substrate, the drift region surrounding the shallow trench isolation structure;
- forming a body region in the semiconductor substrate and distanced from the drift region;
- forming a gate structure on a portion of each of the body region, the drift region, and the shallow trench isolation structure;
- forming a drain region in the drift region on one de of the gate structure;
- forming a source region in the body region on an other side of the gate structure;
- and
- forming a first shallow doped region in the drain region and the drift region to surround the shallow trench isolation structure, the first shallow doped region having a same doping type as for the drain region and a depth less than the drain region and the drift region.
An LDMOS transistor, comprising:
- a semiconductor substrate;
- a shallow trench isolation structure in the semiconductor substrate;
- drift region located in the semiconductor substrate and surrounding the shallow trench isolation structure;
- a body region located in the semiconductor substrate and distanced from the drift region;
- a gate structure on a portion of each of the body region, the drift region, and the shallow trench isolation structure;
- a drain region located in the drift region on one side of the gate structure;
- a source region located in the body region on an other side of the gate structure;
- and
- a first shallow doped region located in the drain region and in the drift region to surround the shallow trench isolation structure, the first shallow doped region having a same doping type as that of the drain region and a depth less than the drain region and the drift region.
Dependencies are inferred from the claim text.