Integrated capacitors with nanosheet transistors
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, James J. Demarest, John G. Gaudiello, Juntao Li
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Abstract
A semiconductor device and process of making the same generally includes simultaneously forming nanosheet capacitors with nanosheet FET devices on the same substrate. The nanosheets in the capacitor have a width and are coupled to one another by sacrificial layers, wherein the sacrificial layers have a width smaller than the nanosheet width, and wherein the nanosheets and the sacrificial layers are conductively coupled to the substrate. The nanosheets in the FET devices are spaced apart and free of sacrificial layers. The nanosheets in the FET device have a width less than half the width of the nanosheets in the capacitor region.
Claims20
A semiconductor device comprising:
- a capacitor region and a FET region defined by a plurality of stackedly and alternatingly arranged nanosheets and sacrificial layers disposed on a substrate,
- wherein the nanosheets in the capacitor region have a width and are coupled to one another by the sacrificial layers, wherein the sacrificial layers have a width smaller than the nanosheet width;
- wherein the nanosheets in the FET region are spaced apart and free of sacrificial layers, the nanosheets in the FET region having a width less than half the width of the nanosheets in the capacitor region.
A method of making a semiconductor device, the method comprising:
- depositing alternating nanosheet layers and sacrificial layers onto a substrate;
- simultaneously forming fins in a capacitor region and fins in a device region, wherein the fins in the capacitor region have a greater width than the fins in the device region;
- selectively etching the sacrificial layers to form an undercut in the capacitor region and complete removal in the device region;
- doping the alternating nanosheet layers and undercut sacrificial layers in the capacitor region, and portions of the substrate underlying the capacitor region;
- depositing a high k dielectric layer onto the alternating nanosheet layers and undercut sacrificial layers in the capacitor region, and portions of the substrate underlying the capacitor region, and on the nanosheet layers in the device region;
- and
- forming top and bottom electrodes in the capacitor region.
A method of making a semiconductor device, the method comprising:
- depositing a film stack onto a silicon substrate, the film stack comprising alternating layers of silicon and silicon-germanium;
- simultaneously defining a capacitor region by forming fins in the film stack having a first width and a device region by forming fins in the film stack having a second width;
- isotropically etching the silicon-germanium to form an undercut in the capacitor region and complete removal in the device region, wherein the second width of the film stack in the device region is at least less than half of the first width of the film stack in the capacitor region such that isotropic etching forms the undercut in the capacitor region and complete removal in the device region;
- doping the nanosheet, sacrificial layers, and portions of the substrate underlying the capacitor region;
- depositing a high k dielectric layer onto the nanosheet, sacrificial layers, and portions of the substrate underlying the capacitor region, and on the nanosheet layers in the device region;
- and
- forming top and bottom electrodes in the capacitor region.
Dependencies are inferred from the claim text.