Power semiconductor device having fully depleted channel regions

A method of operating a power semiconductor device, wherein the power semiconductor device comprises:

• a semiconductor body coupled to a first load terminal structure and a second load terminal structure and configured to conduct a load current;
• a first cell, a second cell, and a third cell each being configured for controlling the load current, wherein each of the first cell and the second cell are electrically connected to the first load terminal structure on the one side and electrically connected to a drift region of the semiconductor body on the other side, and wherein the third cell is electrically connected to the second load terminal structure on the one side and electrically connected to the drift region on the other side, the drift region having a first conductivity type;
• a first mesa included in the first cell, the first mesa including:
• a first port region having the first conductivity type and being electrically connected to the first load terminal structure, and a first channel region being coupled to the drift region;
• a second mesa included in the second cell, the second mesa including:
• a second port region having the second conductivity type and being electrically connected to the first load terminal structure, and a second channel region being coupled to the drift region;
• a third mesa included in the third cell, the third mesa including:
• a third port region having the first conductivity type and being electrically connected to the second load terminal structure, and a third channel region being coupled to the drift region;
• each of the first mesa and the second mesa being spatially confined, in a direction perpendicular to a direction of the load current within the respective mesa, by the first insulation structure and exhibiting a total extension of less than 100 nm in said direction;
• at least one first control electrode configured to induce an inversion channel within the first channel region;
• at least one third control electrode configured to induce an inversion channel within the third channel region;
• wherein the method comprises:
• providing a first control signal to the at least one first control electrode so as to operate the power semiconductor device in a forward conducting state, in which the first control electrode induces the inversion channel within the first channel region;
• and
• in the forward conducting state, providing a third control signal to the at least one third control electrode so as to switch the power semiconductor device from a first forward conducting mode, in which the third control electrode does not induce the inversion channel within the third channel region, to a second forward conducting mode, in which the third control electrode induces the inversion channel within the third channel region.