Semiconductor memory device and method of manufacturing the same
AssigneeToshiba Memory Corporation
InventorsTakuo OHASHI, Fumiki AISO
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Abstract
According to an embodiment, a semiconductor memory device includes a plurality of control gate electrodes, a semiconductor layer, and a charge accumulation layer. The plurality of control gate electrodes are provided as a stack above a substrate. The semiconductor layer has as its longitudinal direction a direction perpendicular to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. A lower end of the charge accumulation layer is positioned more upwardly than a lower end of a lowermost layer-positioned one of the control gate electrodes.
Claims10
A semiconductor memory device, comprising:
- a plurality of control gate electrodes provided as a stack above a substrate;
- a semiconductor layer having as its longitudinal direction a direction perpendicular to the substrate, the semiconductor layer facing the plurality of control gate electrodes;
- and
- a charge accumulation layer positioned between the control gate electrode and the semiconductor layer,
- a lower end of the charge accumulation layer being positioned more upwardly than a lower end of a lowermost layer-positioned one of the control gate electrodes.
Dependencies are inferred from the claim text.