Semiconductor device
AssigneeSK hynix Inc.
InventorJae Yong CHA
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes a common source region formed in a semiconductor substrate, a bit line formed over the semiconductor substrate, first and second vertical channel layers coupled between the bit line and the common source region, wherein the first and second vertical channel layers are alternately arranged on the semiconductor substrate, first conductive layers stacked over the semiconductor substrate to surround one side of the first vertical channel layer, second conductive layers stacked over the semiconductor substrate to surround one side of the second vertical channel layer, and a charge storage layer formed between the first vertical channel layer and the first conductive layers and between the second vertical channel layer and the second conductive layers.
Claims7
1-13. (canceled)
A semiconductor device, comprising:
- first, second, fifth and sixth vertical channel layers vertically coupled between a semiconductor substrate and a bit line;
- third, fourth, seventh and eighth vertical channel layers vertically coupled between the semiconductor substrate and a common source line;
- first, third, fifth and seventh multilayer conductive layers stacked on the semiconductor substrate at predetermined distances to surround one side of the first, third, fifth and seventh vertical channel layers, respectively;
- second, fourth, sixth and eighth multilayer conductive layers stacked on the semiconductor substrate at predetermined distances to surround one side of the second, fourth, sixth and eighth vertical channel layers, respectively;
- charge storage layers formed between the first to eighth vertical channel layers and the first to eighth multilayer conductive layers;
- a first pipe channel layer formed in the semiconductor substrate to couple lower portions of the first and eighth vertical channel layers;
- a second pipe channel layer formed in the semiconductor substrate to couple lower portions of the second and third vertical channel layers;
- a third pipe channel layer formed in the semiconductor substrate to couple lower portions of the fourth and fifth vertical channel layers;
- and
- a fourth pipe channel layer formed in the semiconductor substrate to couple lower portions of the sixth and seventh vertical channel layers.
Dependencies are inferred from the claim text.