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US 2018/0006042 A1Published application
Semiconductor memory
AssigneeToshiba Memory Corporation
InventorsTomoo HISHIDA, Sadatoshi MURAKAMI, Ryota KATSUMATA, Masao IWASE
Life of this patent
Estimating the term…
Abstract
A semiconductor memory includes a memory cell region that includes multiple memory cells stacked above a semiconductor substrate, first and second dummy regions on opposite sides of the memory cell region, each dummy region including multiple dummy cells stacked above the semiconductor substrate, and a wiring that electrically connects dummy cells of the first and second dummy regions that are at a same level above the semiconductor substrate.
Claims21
(canceled)
A memory comprising:
- a first memory cell array above a semiconductor substrate;
- a second memory cell array above the semiconductor substrate;
- a first interconnection surrounding the first memory cell array and including a first part that is between the first memory cell array and the second memory cell array and a second part, wherein the first memory cell array is between the first part and the second part;
- and
- a second interconnection above the first memory cell array, the second memory cell array, the first part, and the second part, and electrically connected to at least one memory cell of the first memory cell array and to at least one memory cell of the second memory cell array.
2 more elements
A memory comprising:
- a plurality of first word lines and second word lines stacked above a semiconductor substrate,
- a plurality of semiconductor pillars extending through the first and second word lines, wherein memory cells are formed at intersections of the semiconductor pillars and the first and second word lines;
- a first interconnection surrounding the memory cells and including a first part and a second part, wherein the memory cells are between the first part and the second part;
- and
- a second interconnection above the memory cells, the first and second word lines, the first part, and the second part, and electrically connected to at least one of the memory cells.
2 more elements
Dependencies are inferred from the claim text.