US 2018/0006035 A1 · FIN FIELD EFFECT TRANSISTOR (FET) (FINFET) COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) CIRCUITS EMPLOYING SINGLE AND DOUBLE DIFFUSION BREAKS FOR INCREASED PERFORMANCE

Abstract

Fin Field Effect Transistor (FET) (FinFET) complementary metal oxide semiconductor (CMOS) circuits with single and double diffusion breaks for increased performance are disclosed. In one aspect, a FinFET CMOS circuit employing single and double diffusion breaks includes a P-type FinFET that includes a first Fin formed from a semiconductor substrate and corresponding to a P-type diffusion region. The FinFET CMOS circuit includes an N-type FinFET that includes a second Fin formed from the semiconductor substrate and corresponding to an N-type diffusion region. To electrically isolate the P-type FinFET, first and second single diffusion break (SDB) isolation structures are formed in the first Fin on either side of a gate of the P-type FinFET. To electrically isolate the N-type FinFET, first and second double diffusion break (DDB) isolation structures are formed in the second Fin on either side of a gate of the N-type FinFET.

Claims23

Dependent claims

A Fin Field Effect Transistor (FinFET) complementary metal oxide semiconductor (CMOS) circuit, comprising:

a semiconductor substrate;
a P-type FinFET comprising a first Fin formed from the semiconductor substrate and corresponding to a P-type semiconductor material (P-type) diffusion region;
an N-type FinFET comprising a second Fin formed from the semiconductor substrate and corresponding to an N-type semiconductor material (N-type) diffusion region;
a first single diffusion break (SDB) isolation structure formed in the first Fin on a first side of a gate of the P-type FinFET;
a second SDB isolation structure formed in the first Fin on a second side of the gate of the P-type FinFET opposite of the first side of the gate of the P-type FinFET;
a first double diffusion break (DDB) isolation structure formed in the second Fin on a first side of a gate of the N-type FinFET;
and
a second DDB isolation structure formed in the second Fin on a second side of the gate of the N-type FinFET opposite of the first side of the gate of the N-type FinFET.

5 more elements

A method of fabricating a Fin Field Effect Transistor (FinFET) complementary metal oxide semiconductor (CMOS) circuit with single and double diffusion breaks, comprising:

providing a semiconductor substrate comprising a first Fin corresponding to a P-type semiconductor material (P-type) diffusion region of the semiconductor substrate, and a second Fin corresponding to an N-type semiconductor material (N-type) diffusion region of the semiconductor substrate;
forming a first double diffusion break (DDB) isolation structure in the second Fin;
forming a second DDB isolation structure in the second Fin;
forming a P-type FinFET comprising the first Fin and an N-type FinFET comprising the second Fin such that a gate of the N-type FinFET is disposed between the first DDB isolation structure and the second DDB isolation structure;
forming a first single diffusion break (SDB) isolation structure in the first Fin on a first side of a gate of the P-type FinFET;
and
forming a second SDB isolation structure in the first Fin on a second side of the gate of the P-type FinFET opposite of the first side of the gate of the P-type FinFET.

4 more elements

Dependencies are inferred from the claim text.

Fin field effect transistor (fet) (finfet) complementary metal oxide semiconductor (cmos) circuits employing single and double diffusion breaks for increased performance

Life of this patent

Fin field effect transistor (fet) (finfet) complementary metal oxide semiconductor (cmos) circuits employing single and double diffusion breaks for increased performance

Life of this patent

Abstract

Claims23