Long channel and short channel vertical fet co-integration for vertical fet vtfet
AssigneeInternational Business Machines Corporation
InventorsTerence B. Hook, Baozhen Li, Kirk David Peterson, Junli Wang
Life of this patent
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Abstract
A semiconductor and a method of forming a semiconductor on a single chip, including forming a shallow trench isolation (STI) region on a short channel device and a long channel device, forming at least two vertical fins connected in the long channel device, and forming contacts on a source and drain regions for the long channel device and short channel device, wherein the contacts connect a top surface of the source or drain region for series FET (Field-Effect Transistor) connection for the long channel device.
Claims21
1-7. (canceled)
A semiconductor chip, comprising:
- a short channel device comprising a vertical FET (Field-Effect Transistor);
- and
- a long channel device comprising a second vertical FET integrated with the short channel device,
- wherein the long channel device comprises a series connection of a plurality of short channel devices, and
- wherein the short channel and the long channel devices are co-integrated on a same chip.
A semiconductor device, comprising:
- a short channel device being vertically formed;
- a long channel device being vertically formed and co-integrated with the short channel device on a same chip;
- wherein the long channel device comprises:
- a well;
- a plurality of vertical fins formed over the well;
- source-drain regions formed over a top surface of the plurality of fins;
- and
- a plurality of metal contacts connecting at least two of the plurality of fins.
A semiconductor device on a single chip, the semiconductor comprising:
- a shallow trench isolation (STI) region formed for a short channel device and a long channel device in a substrate;
- at least two vertical fins connected in the long channel device;
- and
- contacts formed on a source-drain regions for the long channel device and the short channel device,
- wherein the contacts connect a top surface of the source-drain region for a series FET (Field-Effect Transistor) connection for the long channel device.
Dependencies are inferred from the claim text.