Integrated circuit layout and method of configuring the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Te LIN, Ting-Wei CHIANG, Hui-Zhong ZHUANG, Pin-Dai SUE, Li-Chun TIEN
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes at least one first active region, at least one second active region adjacent to the first active region, and a plurality of third active regions. The first active region and the second active region are staggered. The third active regions are present adjacent to the first active region, wherein the third active regions are substantially aligned with each other.
Claims20
An integrated circuit comprising:
- at least one first active region;
- at least one second active region adjacent to the first active region, wherein the first active region and the second active region are staggered;
- and
- a plurality of third active regions adjacent to the first active region, wherein the third active regions are substantially aligned with each other.
An integrated circuit comprising:
- a first cell comprising:
- a first active region;
- a first gate electrode crossing the first active region;
- a second active region adjacent to the first active region;
- and
- a second gate electrode crossing the second active region;
- and
- a second cell comprising:
- a plurality of third active regions adjacent to each other;
- and
- a third gate electrode crossing the third active regions, wherein the first cell and the second cell abut each other.
A method of configuring an integrated circuit layout using a processor, the method comprising:
- using the processor, generating a first cell comprising at least one first active region and at least one second active region arranged therein, wherein the first active region and the second active region are adjacent to each other but are not aligned, and a second cell comprising a plurality of third active regions substantially aligned with each other;
- using the processor, abutting the first cell and the second cell on the integrated circuit layout;
- generating a set of instructions for manufacturing an integrated circuit based upon the integrated circuit layout;
- and
- storing the set of instructions in an non-transitory machine readable storage medium.
Dependencies are inferred from the claim text.