Semicondcutor package and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsLi-Hui Cheng, Jing-Cheng Lin, Po-Hao Tsai
Life of this patent
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Abstract
A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package has a redistribution layer, at least one die over the redistribution layer, through interlayer vias on the redistribution layer and aside the die and a molding compound encapsulating the die and the through interlayer vias disposed on the redistribution layer. The semiconductor package has connectors connected to the through interlayer vias and a protection film covering the molding compound and the die. The protection film is formed by a printing process.
Claims20
A semiconductor package comprising:
- a redistribution layer;
- at least one die, disposed on the redistribution layer;
- a molding compound, disposed on the redistribution layer and encapsulating the at least one die;
- through interlayer vias, disposed on the redistribution layer and penetrating the molding compound, wherein the through interlayer vias are electrically connected to the redistribution layer and the at least one die;
- a protection film, disposed on the molding compound and the at least one die, wherein the protection film located on the at least one die includes a trench pattern with trenches of substantially flat bottoms;
- connectors, disposed on the through interlayer vias;
- and
- conductive elements, electrically connected to the redistribution layer.
A semiconductor package comprising:
- a redistribution layer;
- at least one die, disposed on the redistribution layer;
- through interlayer vias, disposed on the redistribution layer and aside of the at least one die, wherein the through interlayer vias are electrically connected to the redistribution layer and the at least one die;
- a molding compound, disposed on the redistribution layer and encapsulating the at least one die and the through interlayer vias;
- a dielectric material layer, disposed on the molding compound and the at least one die, wherein the dielectric material layer includes a first dielectric pattern disposed on the at least one die;
- a protection film, disposed over the molding compound and the at least one die and disposed on the dielectric material layer, wherein the protection film located on the first dielectric pattern and above the at least one die includes a trench pattern with trenches of substantially flat bottoms;
- first connectors, disposed on the through interlayer vias;
- and
- conductive elements, electrically connected to the redistribution layer.
A manufacturing method for semiconductor packages, comprising:
- forming a buffer layer on a carrier;
- forming through interlayer vias on the buffer layer and over the carrier;
- disposing a plurality of dies on the buffer layer and aside the through interlayer vias;
- forming a molding compound over the buffer layer and over the carrier, encapsulating the plurality of dies and the through interlayer vias;
- forming a redistribution layer on the molding compound, on the through interlayer vias and on the plurality of dies, wherein the through interlayer vias are electrically connected to the redistribution layer;
- disposing conductive elements on the redistribution layer;
- removing the carrier to expose the buffer layer;
- removing the buffer layer;
- forming a protection film over the molding compound and the plurality of dies by a printing process but exposing the through interlayer vias, and the protection film is formed with trenches having substantially flat bottoms in a marking area of the semiconductor package;
- forming connectors on the through interlayer vias;
- and
- performing a dicing process cutting through the molding compound and the redistribution layer to separate the semiconductor packages.
Dependencies are inferred from the claim text.