Semiconductor package and method for fabricating the same

A semiconductor package comprising:

• a substrate;
• a first semiconductor chip stack disposed on the substrate, wherein the first semiconductor chip stack includes first and second semiconductor chips stacked sequentially;
• a second semiconductor chip stack, wherein a first portion of the second semiconductor chip stack is disposed on the first semiconductor chip stack, and a second portion of the second semiconductor chip stack not disposed on the first semiconductor chip stack overhangs the substrate, and wherein the second semiconductor chip stack includes third and fourth semiconductor chips stacked sequentially;
• and
• a support supporting the second portion of the second semiconductor chip stack overhanging the substrate,
• wherein each of the first and second semiconductor chips includes a first semiconductor chip pad disposed on an upper surface of each of the first and second semiconductor chips adjacent to a first side of the first semiconductor chip stack,
• wherein each of the third and fourth semiconductor chips includes a second semiconductor chip pad disposed on an upper surface of each of the third and fourth semiconductor chips adjacent to a second side of the second semiconductor chip stack opposite the first side of the first semiconductor chip stack,
• wherein the second semiconductor chip is disposed on the first semiconductor chip to expose the first pad of the first semiconductor chip,
• wherein the fourth semiconductor chip is disposed on the third semiconductor chip to expose the second pad of the third semiconductor chip, and
• wherein the third and fourth semiconductor chips expose the first semiconductor chip pad on the second semiconductor chip.

A semiconductor package, comprising:

• a substrate;
• a first semiconductor chip stack comprising a plurality of first semiconductor chips arranged in a staircase configuration along a first direction, wherein an upper surface of an uppermost one of the first semiconductor chips comprises a first semiconductor chip pad, and wherein the first semiconductor chip pad is electrically connected to a first upper finger pad disposed on the substrate;
• a second semiconductor chip stack comprising a plurality of second semiconductor chips arranged in a staircase configuration along a second direction opposite the first direction, wherein a first portion of the second semiconductor chip stack is disposed on the upper surface of the uppermost one of the first semiconductor chips, wherein a second portion of the second semiconductor chip stack overhangs the substrate, wherein an upper surface of an uppermost one of the second semiconductor chips comprises a second semiconductor chip pad, and wherein the second semiconductor chip pad is electrically connected to a second upper finger pad disposed on the substrate;
• and
• a support supporting the second portion of the second semiconductor chip stack overhanging the substrate,
• wherein the first portion of the second semiconductor chip stack is spaced apart from the first semiconductor chip pad.