US 2018/0005941 A1 · SEMICONDUCTOR DEVICE INCLUDING A POROUS DIELECTRIC LAYER, AND METHOD OF FORMING THE SEMICONDUCTOR DEVICE

Abstract

A semiconductor device includes a porous dielectric layer formed on an interconnect layer and including a recessed portion, a conductive layer formed in the recessed portion, and a conformal cap layer formed on the porous dielectric layer and on the conductive layer in the recessed portion, an upper surface of the porous dielectric layer being exposed through a gap in the conformal cap layer. Porous dielectric material is protected by back-filled pore fillers or leave-in porogens from process integration such as chemical mechanical polishing (CMP). The pore fillers or porogens are removed after CMP and Cap process to achieve low capacitance. A self-aligned cap protects the conductor metal from exposing the severe conditions during the pore filler or porogen removal process.

Claims18

Dependent claims

A semiconductor device comprising:

a porous dielectric layer formed on an interconnect layer and including a recessed portion;
a conductive layer formed in the recessed portion;
and
a conformal cap layer formed on the porous dielectric layer and on the conductive layer in the recessed portion, an upper surface of the porous dielectric layer being exposed through a gap in the conformal cap layer.

1 more element

Dependencies are inferred from the claim text.

Facts

Application

15/199,321Filed 30 Jun 2016

Published

4 Jan 2018

Term ends

Not estimatedThe source records don’t support an estimate.

Classification18 codes

H10W 20/42
Characterised by their conductive parts: vias, e.g. via plugs
H10W 20/033
Of conductive barrier, adhesion or liner layers: in openings in dielectrics
H10W 20/056
Of conductive parts of the interconnections: by filling conductive material into holes, grooves or trenches
H10W 20/062
Of conductive parts of the interconnections: by smoothing of conductive parts, e.g. by planarisation

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Life of this patent

Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device

Life of this patent

Abstract

Claims18