Semiconductor package and manufacturing method of the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMING-FA CHEN, SUNG-FENG YEH, CHEN-HUA YU
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMING-FA CHEN, SUNG-FENG YEH, CHEN-HUA YU
Estimating the term…
The present disclosure provides a semiconductor package, including a first semiconductor structure, a first bonding dielectric over the first semiconductor structure and surrounding a first bonding metallization structure, a through via over the first bonding dielectric, and a passive device passive device electrically coupled to the through via and the first bonding metallization structure. The present disclosure also provides a method for manufacturing a semiconductor package, including providing a first die, bonding a second die with the first die, wherein the second die partially covers the first die thereby forming a gap over an uncovered portion of the first die, filling the gap over the first die with dielectric, forming a through dielectric via (TDV) in the filled gap, and forming a passive device over the second die and the TDV.
A semiconductor package, comprising:
A multi-chip semiconductor package, comprising:
A method for manufacturing a multi-chip semiconductor package, comprising:
Dependencies are inferred from the claim text.