Circuit redistribution structure unit and method for manufacturing circuit redistribution structure

A method for manufacturing a circuit redistribution structure, the method comprising:

• forming a first dielectric layer on a carrier;
• forming a plurality of first holes and a plurality of second holes in the first dielectric layer;
• respectively forming a plurality of first conductive vias and a plurality of second conductive vias in the first holes and the second holes, and forming a first circuit redistribution layer on the first dielectric layer, wherein a first portion of the first circuit redistribution layer is electrically connected to the first conductive vias, and a second portion of the first circuit redistribution layer is electrically connected to the second conductive vias;
• forming a second dielectric layer on the first dielectric layer and the first circuit redistribution layer;
• forming a plurality of third holes and a plurality of fourth holes in the second dielectric layer to respectively expose the first portion and the second portion of the first circuit redistribution layer, and forming a trench in the second dielectric layer to expose the first dielectric layer and divide the second dielectric layer into a first portion and a second portion, wherein the first portion of the first circuit redistribution layer and the third holes are disposed in the first portion of the second dielectric layer, and the second portion of the first circuit redistribution layer and the fourth holes are disposed in the second portion of the second dielectric layer;
• and
• respectively forming a plurality of third conductive vias and a plurality of fourth conductive vias in the third holes and the fourth holes, and forming a first portion of a second circuit redistribution layer on the first portion of the second dielectric layer and forming a second portion of the second circuit redistribution layer on the second portion of the second dielectric layer, wherein the first portion of the second circuit redistribution layer is electrically connected to the third conductive vias, and the second portion of the second circuit redistribution layer is electrically connected to the fourth conductive vias.