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US 2018/0005874 A1Published application
Via cleaning to reduce resistance
AssigneeInternational Business Machines Corporation
InventorsYann A.M. Mignot, Chih-Chao Yang
Life of this patent
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Abstract
A method includes forming at least a first via in a multilayer structure comprising a first layer and a second layer formed over the first layer, the first via extending from a top of the second layer to a top of a first contact formed in the first layer and forming a polymer film on at least a portion of sidewalls of the first via by etching the top of the first contact using a cleaning process.
Claims20
A method for forming a semiconductor structure, comprising:
- forming at least a first via in a multilayer structure comprising a first layer and a second layer formed over the first layer, the first via extending from a top of the second layer to a top of a first contact formed in the first layer;
- and
- forming a polymer film on at least a portion of sidewalls of the first via by etching the top of the first contact using a cleaning process.
A semiconductor structure, comprising:
- a multilayer structure comprising a first layer and a second layer formed over the first layer;
- at least a first via extending from a top of the second layer to a top of a first contact formed in the first layer;
- and
- a polymer film on at least a portion of sidewalls of the first via, the polymer film being formed by etching the top of the first contact using a cleaning process.
1 more element
An integrated circuit, comprising:
- a multilayer structure comprising a first layer and a second layer formed over the first layer;
- at least a first via extending from a top of the second layer to a top of a first contact formed in the first layer;
- and
- a polymer film on at least a portion of sidewalls of the first via, the polymer film being formed by etching the top of the first contact using a cleaning process.
1 more element
Dependencies are inferred from the claim text.