Manufacture of group iiia-nitride layers on semiconductor on insulator structures
AssigneeSunEdison Semiconductor Limited
InventorsGang Wang, Michael R. Seacrist
Life of this patent
Estimating the term…
Abstract
A method is provided for forming Group IIIA-nitride layers, such as GaN, on substrates. The Group IIIA-nitride layers may be deposited on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates. The Group IIIA-nitride layers may be deposited by heteroepitaxial deposition on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates.
Claims80
A method of forming a multilayer structure, the method comprising:
- forming a pattern comprising a plurality of mesa islands on a semiconductor-on-insulator structure, wherein the semiconductor-on-insulator structure comprises a single crystal semiconductor handle wafer, a dielectric layer in interfacial contact with the single crystal semiconductor handle wafer, and a single crystal semiconductor device layer in interfacial contact with the dielectric layer, and further wherein the pattern comprising the plurality of mesa islands is formed in the single crystal semiconductor device layer;
- and
- forming a Group IIIA-nitride layer on the plurality of mesa islands.
(canceled)
(canceled)
-9. (canceled)
-14. (canceled)
(canceled)
-25. (canceled)
(canceled)
(canceled)
(canceled)
(canceled)
A multilayer structure comprising:
- a single crystal semiconductor handle wafer comprising two major, generally parallel surfaces, one of which is a front surface of the single crystal semiconductor handle wafer and the other of which is a back surface of the single crystal semiconductor handle wafer, a circumferential edge joining the front and back surfaces of the single crystal semiconductor handle wafer, a bulk region between the front and back surfaces, and a central plane of the single crystal semiconductor handle wafer between the front and back surfaces of the single crystal semiconductor handle wafer;
- a dielectric layer in interfacial contact with a major surface of the single crystal semiconductor handle wafer;
- a single crystal semiconductor device layer in interfacial contact with the dielectric layer, the single crystal semiconductor device layer comprising a pattern comprising a plurality of mesa islands;
- and
- a Group IIIA-nitride layer on the mesa islands.
(canceled)
(canceled)
-56. (canceled)
(canceled)
(canceled)
(canceled)
-71. (canceled)
A multilayer structure comprising:
- a carrier substrate;
- an interfacial bonding layer;
- and
- a Group IIIA-nitride layer, the Group IIIA-nitride layer having a thickness between about 500 nanometers and about 2000 micrometers.
-74. (canceled)
(canceled)
(canceled)
(canceled)
(canceled)
(canceled)
(canceled)
Dependencies are inferred from the claim text.