Logic Timing and Reliability Repair for Nanowire Circuits

A method for improving an integrated circuit design including logic circuitry with devices having transistors with nanowire channels, comprising:

• determining a critical path in the logic circuitry, the critical path including a particular device having a transistor with a nanowire channel;
• and
• adding a repair circuit to the integrated circuit design connected to the particular device in the critical path, the repair circuit when activated applying a self-heating stress to the particular device in the critical path.

An integrated circuit including logic circuitry with devices having transistors with nanowire channels, comprising:

• a repairable path in the logic circuitry, the repairable path including a particular device having a transistor with a nanowire channel;
• and
• a repair circuit connected to the particular device in the repairable path, the repair circuit including a selection block selecting among a plurality of signals as an input signal to the particular device, the plurality of signals including a repair signal and an operational logic signal, the repair signal being such as to apply a self-heating stress to the nanowire channel of the particular device when activated.

A method for repairing logic circuitry with devices having transistors with nanowire channels on an integrated circuit, comprising:

• identifying in the logic circuitry a repairable path which has a negative timing slack;
• and
• applying a stress on a particular device having a transistor with a nanowire channel in the repairable path to change the timing slack of the repairable path.

A computer system for improving an integrated circuit design including logic circuitry with devices having transistors with nanowire channels, comprising:

• means for determining a critical path in the logic circuitry, the critical path including a particular device having a transistor with a nanowire channel;
• and
• means for adding a repair circuit to the integrated circuit design connected to the particular device in the critical path, the repair circuit when activated applying a self-heating stress to the particular device in the critical path.