Circuit and method for adjusting select gate voltage of non-volatile memory during erasure of memory cells based on a well voltage
AssigneeMacronix International Co., Ltd.
InventorsShuo-Nan Hung, Shin-Jang Shen, Wei-Jen Chen
Life of this patent
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Abstract
A circuit for adjusting a select gate voltage of a non-volatile memory is provided. The circuit includes a well, a select gate, and an adjustment unit. There is a capacitive coupling between the well and the select gate. The adjustment unit generates a driving voltage for the select gate based on a non-constant voltage.
Claims10
A circuit for adjusting a select gate voltage of a non-volatile memory, comprising:
- a well;
- a select gate, wherein there is a capacitive coupling between the well and the select gate;
- and
- an adjustment unit generating a driving voltage for the select gate based on a non-constant voltage.
A method for adjusting a select gate voltage of a non-volatile memory, wherein there is a capacitive coupling between a well and a select gate of the non-volatile memory, the method comprising:
- generating a driving voltage by using an adjustment unit;
- and
- conducting the driving voltage to the select gate.
Dependencies are inferred from the claim text.