Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells
AssigneeMicron Technology, Inc.
InventorEric Carman
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Abstract
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Prior to writing a logic value to a ferroelectric memory cell, a digit line of a ferroelectric memory cell may be biased to a first voltage, and a cell plate of the ferroelectric memory cell may be biased to a second voltage. A magnitude of a difference between the first voltage and the second voltage may be greater than a magnitude of a write voltage for the first ferroelectric memory cell. The magnitude of the difference between the first voltage and the second voltage may decrease the time to reach a write voltage for the ferroelectric memory cell. Several example cell plate drivers are also disclosed.
Claims20
A method of operating at least one ferroelectric memory cell, comprising:
- determining to write a logic value to a first ferroelectric memory cell and at least one additional ferroelectric memory cell;
- biasing a first cell plate of the first ferroelectric memory cell to a first voltage, prior to writing the logic value to the first ferroelectric memory cell, by applying a drive signal to a first cell plate driver associated with the first ferroelectric memory cell;
- biasing at least one additional cell plate of the at least one additional ferroelectric memory cell to the first voltage, prior to writing the logic value to the at least one additional ferroelectric memory cell, by activating at least one pass gate that applies the drive signal to at least one additional cell plate driver associated with the at least one additional ferroelectric memory cell;
- and
- writing the logic value to the first ferroelectric memory cell and the at least one additional ferroelectric memory cell.
An electronic memory apparatus, comprising:
- a plurality of ferroelectric memory cells comprising a first ferroelectric memory cell and a second ferroelectric memory cell, wherein each of the plurality of ferroelectric memory cells comprises a memory cell selection component coupled to a first terminal of a ferroelectric capacitor;
- a plurality of cell plate drivers, including a first cell plate driver associated with the first ferroelectric memory cell and a second cell plate driver associated with the second ferroelectric memory cell, wherein each of the plurality of cell plate drivers is operable to switch a cell plate of one of a plurality of ferroelectric capacitors between a first voltage and a second voltage;
- at least one pass gate comprising a first pass gate;
- and
- a controller operable to:
- supply a drive signal to the first cell plate driver to bias a first cell plate of the first ferroelectric memory cell to the second voltage;
- and
- operate the first pass gate to selectively supply the drive signal to the second cell plate driver to bias a second cell plate of the second ferroelectric memory cell to the second voltage.
An electronic memory apparatus, comprising:
- a first ferroelectric memory cell coupled with a first digit line and a first cell plate;
- a first cell plate driver coupled with the first ferroelectric memory cell and a first pass gate;
- a second ferroelectric memory cell coupled with a second digit line and a second cell plate;
- a second cell plate driver coupled with the second ferroelectric memory cell and a second pass gate;
- and
- a controller coupled with the first digit line and the second digit line, the controller operable to:
- determine to write a logic value to the first ferroelectric memory cell and the second ferroelectric memory cell;
- bias the first cell plate to a first voltage, prior to writing the logic value to the first ferroelectric memory cell, by applying a drive signal to the first cell plate driver;
- bias the second ferroelectric memory cell to the first voltage, prior to writing the logic value to the second ferroelectric memory cell, by activating the second pass gate to apply the drive signal to the second cell plate driver;
- and
- write the logic value to the first ferroelectric memory cell and the second ferroelectric memory cell.
Dependencies are inferred from the claim text.