Dynamic adjustment of memory cell digit line capacitance
AssigneeMicron Technology, Inc.
InventorsChristopher Kawamura, Charles Ingalls, Scott Derner
Life of this patent
Estimating the term…
Abstract
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be used to store a logic state. The capacitance of a digit line of the ferroelectric memory cell may be dynamically increased prior to, and during a portion of, a read operation used to determine a stored logic state of the cell. The capacitance may be increased by leveraging intrinsic capacitance of digit lines of the array—e.g., by shorting one digit line to another digit line. Increasing the capacitance of the digit line may increase the signal on the digit line that is sensed during the read operation.
Claims20
An apparatus, comprising:
- a first memory cell coupled with a first access line;
- a second memory cell coupled with a second access line different than the first access line, wherein the second access line is shorted with the first access line;
- a selection component coupled with the first access line, wherein the selection component is configured to determine a voltage of the first access line and isolate the first access line from the second access line based at least in part on the determined voltage relative to a threshold value.
An apparatus, comprising:
- a memory cell coupled with a first access line;
- a sense component coupled with the first access line;
- a reference component coupled with the sense component, wherein the reference component is configured to provide a reference voltage to the sense component, wherein the sense component is configured to determine a logic state of the memory cell based at least in part on the reference voltage;
- and
- a capacitor coupled with the first access line, wherein the capacitor is configured to be activated by a memory controller based at least in part on the sense component determining a first logic state of the memory cell.
An apparatus, comprising:
- a first memory cell coupled with a first access line;
- a second memory cell coupled with a second access line different than the first access line;
- a selection component coupled with the first access line;
- and
- a memory controller coupled with the first memory cell, wherein the memory controller is operable to:
- short the first access line with the second access line;
- determine a voltage of the first access line;
- and
- isolate the first access line from the second access line based at least in part on the determined voltage of the first access line exceeding a threshold value.
Dependencies are inferred from the claim text.