Input circuit and semiconductor device including the same
AssigneeSK hynix Inc.
InventorYeonsu Jang
Life of this patent
Estimating the term…
Abstract
An input circuit may include: an internal bias generation unit suitable for generating first and second bias voltages in response to a first enable signal; a buffer control unit suitable for comparing a reference voltage to the first and second bias voltages, and generating a plurality of buffer control signals based upon the comparison of the reference voltage with the first and second bias voltages; and a buffer unit including a plurality of buffers, wherein a buffer is driven to receive the reference voltage and an external input signal, and generates an internal signal, in response to an activated buffer control signal among the plurality of buffer control signals.
Claims20
An input circuit comprising:
- an internal bias generation unit suitable for generating first and second bias voltages in response to a first enable signal;
- a buffer control unit suitable for comparing a reference voltage to the first and second bias voltages, and generating a plurality of buffer control signals based upon the comparison of the reference voltage with the first and second bias voltages;
- and
- a buffer unit including a plurality of buffers, wherein a buffer is driven to receive the reference voltage and an external input signal, and generates an internal signal, in response to an activated buffer control signal among the plurality of buffer control signals.
A semiconductor device comprising:
- an input circuit suitable for receiving an external signal and generating an internal signal;
- and
- an internal circuit suitable for operating in response to the internal signal received from the input circuit,
- wherein the input circuit comprises:
- an internal bias generation unit suitable for generating a first bias voltage and a second bias voltage in response to a first enable signal, the second bias voltage having a higher voltage level than the first bias voltage;
- a buffer control unit suitable for comparing a reference voltage to the first and second bias voltages and generating first to third buffer control signals corresponding to the reference voltage;
- and
- a buffer unit including first to third buffers, wherein a buffer among the first to third buffer control signals is driven to receive the reference voltage and the external signal, and generates the internal signal, in response to an activated buffer control signal among the plurality of buffer control signals.
The semiconductor device of claim wherein the buffer control unit comprises:
- first and second enable signal control units suitable for receiving the first and second bias voltages in response to the first enable signal, and generating second and third enable signals of which activations are controlled according to the reference voltage, respectively;
- and
- first to third buffer control signal generators suitable for generating the first to third buffer control signals for controlling the operations of the first to third buffer units in response to the first to third enable signals, respectively.
Dependencies are inferred from the claim text.