Display device

A display device comprising:

• a substrate having a first pixel region, a second pixel region, a third pixel region, and a peripheral region surrounding the first to third pixel regions, each of the second and third pixel regions having a smaller area than the first pixel region, the second and third pixel regions being connected to the first pixel region, the second and third pixel regions being spaced from each other;
• a first pixel, a second pixel, and a third pixel respectively at the first to third pixel regions;
• a first scan line, a second scan line, and a third scan line connected to the first to third pixels to provide a scan signal to each of the first to third pixels;
• and
• dummy units in the peripheral region, the dummy units respectively overlapping with the second and third scan lines, the dummy units being configured to compensate for a difference between a load value of the first scan line and a load value of the second scan line and a difference between the load value of the first scan line and a load value of the third scan line,
• wherein the dummy units comprise at least two sub-dummy units spaced from each other.

A display device comprising:

• a substrate having a first pixel region, a second pixel region, a third pixel region, and a peripheral region surrounding the first, second, and third pixel regions, the second and third pixel regions being adjacent to a same side of the first pixel region and each having a smaller area than the first pixel region;
• a first pixel in the first pixel region, and a second pixel and a third pixel respectively at the second pixel region;
• a first scan line, a second pair of scan lines, and a third pair of scan lines for providing scan signals to the first, second, and third pixels, respectively;
• and
• a dummy unit comprising a first sub-dummy unit and a second sub-dummy unit, the first and second sub-dummy units being spaced from one another at the peripheral region, the first and second sub-dummy units overlapping the second and third pair of scan lines, respectively, to form parasitic capacitors with the second and third pair of scan lines, the parasitic capacitors being configured to compensate for a difference between a load value of the first line and load values of the second and third pair of scan lines.