Buffering graphics tiled resource translations in a data port controller tlb
AssigneeIntel Corporation
InventorsAbhishek R. Appu, Sandeep S. Sodhi, Joydeep Ray, James A. Valerio
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Abstract
Methods and apparatus relating to buffering graphics tiled resource translations in a data port controller TLB (Translation Lookaside Buffer) are described. In an embodiment, controller logic causes storage of information corresponding to a tiled resource in a first entry of a Translation Lookaside Buffer (TLB) in response to a request corresponding to the tiled resource. A second entry of the TLB is capable of storing data corresponding to a coherent memory request. The tiled resource comprise data corresponding to a portion of an image. Other embodiments are also disclosed and claimed.
Claims25
An apparatus comprising:
- controller logic, at least a portion of which is in hardware, to cause storage of information corresponding to a tiled resource in a first entry of a Translation Lookaside Buffer (TLB) in response to a request corresponding to the tiled resource,
- wherein a second entry of the TLB is capable to store data corresponding to a coherent memory request, wherein the tiled resource is to comprise data corresponding to a portion of an image.
A method comprising:
- causing storage of information corresponding to a tiled resource in a first entry of a Translation Lookaside Buffer (TLB) in response to a request corresponding to the tiled resource,
- wherein a second entry of the TLB is capable to store data corresponding to a coherent memory request, wherein the tiled resource comprises data corresponding to a portion of an image.
One or more computer-readable medium comprising one or more instructions that when executed on at least one processor configure the at least one processor to perform one or more operations to:
- cause storage of information corresponding to a tiled resource in a first entry of a Translation Lookaside Buffer (TLB) in response to a request corresponding to the tiled resource,
- wherein a second entry of the TLB is capable to store data corresponding to a coherent memory request, wherein the tiled resource comprises data corresponding to a portion of an image.
Dependencies are inferred from the claim text.