Statistics Operations On Two Dimensional Image Processor

A machine readable storage medium containing program code that when processed by a processor comprising a two-dimensional shift register coupled to an execution lane array causes a method to be performed, comprising:

• loading an array of content into the two-dimensional shift register;
• repeatedly performing a first sequence comprising:
• shifting with the shift register first content residing along a particular row or column into another parallel row or column where second content resides and performing mathematical operations with a particular corresponding row or column of the execution lane array on the first and second content;
• and,
• repeatedly performing a second sequence comprising:
• shifting with the shift register content from a set of first locations along a resultant row or column that is parallel with the rows or columns of the first sequence into a corresponding set of second locations along the resultant row or column, the resultant row or column having values determined at least in part from the mathematical operations of the first sequence, and performing mathematical operations on items of content from the set of first locations and respective items of content from the set of second locations with the execution lane array.

A computing system, comprising:

• a plurality of processing cores;
• a memory controller coupled to a system memory, the memory controller coupled to the plurality of processing cores;
• an image processor, the image processor having a two-dimensional shift register coupled to an execution lane array;
• a storage medium containing program code that when processed by the image processor causes a method to be performed, comprising:
• loading an array of content into the two-dimensional shift register;
• repeatedly performing a first sequence comprising:
• shifting with the shift register first content residing along a particular row or column into another parallel row or column where second content resides and performing mathematical operations with a particular corresponding row or column of the execution lane array on the first and second content;
• and,
• repeatedly performing a second sequence comprising:
• shifting with the shift register content from a set of first locations along a resultant row or column that is parallel with the rows or columns of the first sequence into a corresponding set of second locations along the resultant row or column, the resultant row or column having values determined at least in part from the mathematical operations of the first sequence, and performing mathematical operations on items of content from the set of first locations and respective items of content from the set of second locations with the execution lane array.