Secure boot with resistance to differential power analysis and other external monitoring attacks

A system, comprising:

• a first device comprising secure storage hardware and processing hardware operatively coupled to the secure storage hardware, wherein the secure storage hardware is to store a secret value and the processing hardware is to:
• receive a message from a second device to authenticate the first device;
• retrieve the secret value from the secure storage hardware;
• derive a validator from the secret value using a path through a key tree, wherein the path is based on the message, wherein deriving the validator using the path through the key tree comprises computing a plurality of successive intermediate keys starting with a value based on the secret value and leading to the validator, wherein each successive intermediate key is derived based on at least a portion of the message and a prior key;
• and
• send the validator to the second device.

A system comprising:

• a first device comprising processing hardware, wherein the processing hardware is to:
• send a message to a second device;
• receive a response from the second device, the response comprising a first validator;
• derive a second validator from a secret value using a path through a key tree, wherein the path is based on the message, wherein deriving the second validator using the path through the key tree comprises computing a plurality of successive intermediate keys starting with a value based on the secret value and leading to the validator, wherein each successive intermediate key is derived based on at least a portion of the message and a prior key;
• and
• compare the first validator to the second validator;
• determine whether the first validator matches the second validator;
• and
• verify that the second device is authentic responsive to determining that the first validator matches the second validator.